<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/pinctrl/intel, branch v5.17</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.17</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.17'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2022-02-19T01:03:58Z</updated>
<entry>
<title>Merge tag 'intel-pinctrl-v5.17-5' of gitolite.kernel.org:pub/scm/linux/kernel/git/pinctrl/intel into fixes</title>
<updated>2022-02-19T01:03:58Z</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2022-02-19T01:03:58Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=486c2d15aa812d669bb27f8241aa5d5dafbac5b9'/>
<id>urn:sha1:486c2d15aa812d669bb27f8241aa5d5dafbac5b9</id>
<content type='text'>
intel-pinctrl for v5.17-5

* Revert misplaced ID

The following is an automated git shortlog grouped by driver:

tigerlake:
 -  Revert "Add Alder Lake-M ACPI ID"
</content>
</entry>
<entry>
<title>pinctrl: tigerlake: Revert "Add Alder Lake-M ACPI ID"</title>
<updated>2022-02-15T17:02:46Z</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2021-12-14T17:49:13Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6f66db29e2415cbe8759c48584f9cae19b3c2651'/>
<id>urn:sha1:6f66db29e2415cbe8759c48584f9cae19b3c2651</id>
<content type='text'>
It appears that last minute change moved ACPI ID of Alder Lake-M
to the INTC1055, which is already in the driver.

This ID on the other hand will be used elsewhere.

This reverts commit 258435a1c8187f559549e515d2f77fa0b57bcd27.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'intel-pinctrl-v5.17-4' of gitolite.kernel.org:pub/scm/linux/kernel/git/pinctrl/intel into fixes</title>
<updated>2022-01-30T01:27:01Z</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2022-01-30T01:27:01Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=474932a3b215de3dffd828d5ef3296275b80ea01'/>
<id>urn:sha1:474932a3b215de3dffd828d5ef3296275b80ea01</id>
<content type='text'>
intel-pinctrl for v5.17-4

* Couple of fixes on how Intel driver handles an interrupt
* Revert pin renaming change in ZynqMQ as it appears to be part of
  the Device Tree bindings
* Fix ordering of the files in the Makefile

The following is an automated git shortlog grouped by driver:

intel:
 -  Fix a glitch when updating IRQ flags on a preconfigured line
 -  fix unexpected interrupt

Place correctly CONFIG_PINCTRL_ST in the Makefile:
 - Place correctly CONFIG_PINCTRL_ST in the Makefile

zynqmp:
 -  Revert "Unify pin naming"
</content>
</entry>
<entry>
<title>pinctrl: intel: Fix a glitch when updating IRQ flags on a preconfigured line</title>
<updated>2022-01-24T14:30:13Z</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2022-01-19T18:19:15Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e12963c453263d5321a2c610e98cbc731233b685'/>
<id>urn:sha1:e12963c453263d5321a2c610e98cbc731233b685</id>
<content type='text'>
The commit af7e3eeb84e2 ("pinctrl: intel: Disable input and output buffer
when switching to GPIO") hadn't taken into account an update of the IRQ
flags scenario.

When updating the IRQ flags on the preconfigured line the -&gt;irq_set_type()
is called again. In such case the sequential Rx buffer configuration
changes may trigger a falling or rising edge interrupt that may lead,
on some platforms, to an undesired event.

This may happen because each of intel_gpio_set_gpio_mode() and
__intel_gpio_set_direction() updates the pad configuration with a different
value of the GPIORXDIS bit. Notable, that the intel_gpio_set_gpio_mode() is
called only for the pads that are configured as an input. Due to this fact,
integrate the logic of __intel_gpio_set_direction() call into the
intel_gpio_set_gpio_mode() so that the Rx buffer won't be disabled and
immediately re-enabled.

Fixes: af7e3eeb84e2 ("pinctrl: intel: Disable input and output buffer when switching to GPIO")
Reported-by: Kane Chen &lt;kane.chen@intel.com&gt;
Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Tested-by: Grace Kao &lt;grace.kao@intel.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: intel: fix unexpected interrupt</title>
<updated>2022-01-24T14:30:13Z</updated>
<author>
<name>Łukasz Bartosik</name>
<email>lb@semihalf.com</email>
</author>
<published>2022-01-24T12:55:29Z</published>
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<id>urn:sha1:e986f0e602f19ecb7880b04dd1db415ed9bca3f6</id>
<content type='text'>
ASUS Chromebook C223 with Celeron N3350 crashes sometimes during
cold booot. Inspection of the kernel log showed that it gets into
an inifite loop logging the following message:

-&gt;handle_irq():  000000009cdb51e8, handle_bad_irq+0x0/0x251
-&gt;irq_data.chip(): 000000005ec212a7, 0xffffa043009d8e7
-&gt;action(): 00000
   IRQ_NOPROBE set
unexpected IRQ trap at vector 7c

The issue happens during cold boot but only if cold boot happens
at most several dozen seconds after Chromebook is powered off. For
longer intervals between power off and power on (cold boot) the issue
does not reproduce. The unexpected interrupt is sourced from INT3452
GPIO pin which is used for SD card detect. Investigation relevealed
that when the interval between power off and power on (cold boot)
is less than several dozen seconds then values of INT3452 GPIO interrupt
enable and interrupt pending registers survive power off and power
on sequence and interrupt for SD card detect pin is enabled and pending
during probe of SD controller which causes the unexpected IRQ message.
"Intel Pentium and Celeron Processor N- and J- Series" volume 3 doc
mentions that GPIO interrupt enable and status registers default
value is 0x0.
The fix clears INT3452 GPIO interrupt enabled and interrupt pending
registers in its probe function.

Fixes: 7981c0015af2 ("pinctrl: intel: Add Intel Sunrisepoint pin controller and GPIO support")
Signed-off-by: Łukasz Bartosik &lt;lb@semihalf.com&gt;
Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: cherryview: Trigger hwirq0 for interrupt-lines without a mapping</title>
<updated>2022-01-24T00:12:45Z</updated>
<author>
<name>Hans de Goede</name>
<email>hdegoede@redhat.com</email>
</author>
<published>2022-01-04T16:42:38Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=aa28514592d52043f4837a6457d6310452135ae1'/>
<id>urn:sha1:aa28514592d52043f4837a6457d6310452135ae1</id>
<content type='text'>
Commit bdfbef2d29dc ("pinctrl: cherryview: Don't use selection 0 to mark
an interrupt line as unused") made the code properly differentiate
between unset vs (hwirq) 0 entries in the GPIO-controller interrupt-line
to GPIO pinnumber/hwirq mapping.

This is causing some boards to not boot. This commit restores the old
behavior of triggering hwirq 0 when receiving an interrupt on an
interrupt-line for which there is no mapping.

Fixes: bdfbef2d29dc ("pinctrl: cherryview: Don't use selection 0 to mark an interrupt line as unused")
Reported-and-tested-by: Jarkko Nikula &lt;jarkko.nikula@linux.intel.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Acked-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220104164238.253142-1-hdegoede@redhat.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: cherryview: Use temporary variable for struct device</title>
<updated>2021-11-26T20:37:41Z</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2021-11-26T20:35:42Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=db1b2a8caf5b4954aa62ead5b0580948656eac43'/>
<id>urn:sha1:db1b2a8caf5b4954aa62ead5b0580948656eac43</id>
<content type='text'>
Use temporary variable for struct device to make code neater.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: cherryview: Do not allow the same interrupt line to be used by 2 pins</title>
<updated>2021-11-26T20:37:41Z</updated>
<author>
<name>Hans de Goede</name>
<email>hdegoede@redhat.com</email>
</author>
<published>2021-11-18T10:56:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=07199dbf8cae36c973a89552fee83dd4e0a75972'/>
<id>urn:sha1:07199dbf8cae36c973a89552fee83dd4e0a75972</id>
<content type='text'>
It is impossible to use the same interrupt line for 2 pins, this will
result in the interrupts only being delivered to the IRQ handler for
the pin for which chv_gpio_irq_type() was called last.

The pinctrl-cherryview.c code relies on the BIOS to correctly setup the
interrupt line, but there is a BIOS bug on at least the Medion Akoya E1239T
and the GPD win models where both INT33FF:02 pin 8, used by the powerbutton
and INT33FF:02 pin 21 used as IRQ input for the accelerometer are mapped to
interrupt line 0.

This causes 2 problems:
1. The accelerometer IRQ does not work, since the power button is probed
later taking over the intr_lines[0] slot.

2. Since the accelerometer IRQ is not marked as wakeup, interrupt line 0
gets masked on suspend, causing the power button to not work to wake
the system from suspend.

Likewise on the Lenovo Yogabook, which has a touchscreen as keyboard
and the keyboard half of the tablet also has a Wacom digitizer, the BIOS
by default assigns the same interrupt line to the GPIOs used
for their interrupts.

Fix these problems by adding a check for this and assigning a new
interrupt line to the 2nd pin for which chv_gpio_irq_type() gets called.

With this fix in place the following 2 messages show up in dmesg on
the Medion Akoya E1239T and the GPD win:

 cherryview-pinctrl INT33FF:02: interrupt line 0 is used by both pin 21 and pin 8
 cherryview-pinctrl INT33FF:02: changing the interrupt line for pin 8 to 15

And the following gets logged on the Lenovo Yogabook:

 cherryview-pinctrl INT33FF:01: interrupt-line 0 is used by both pin 49 and pin 56
 cherryview-pinctrl INT33FF:01: changing the interrupt line for pin 56 to 7

Note commit 9747070c11d6 ("Input: axp20x-pek - always register interrupt
handlers") was added as a work around for the power button not being able
to wakeup the system. This relies on using the PMIC's connection to the
power button but that only works on systems with the AXP288 PMIC.
Once this fix has been merged that workaround can be removed.

Cc: Yauhen Kharuzhy &lt;jekhor@gmail.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: cherryview: Don't use selection 0 to mark an interrupt line as unused</title>
<updated>2021-11-26T20:37:41Z</updated>
<author>
<name>Hans de Goede</name>
<email>hdegoede@redhat.com</email>
</author>
<published>2021-11-18T10:56:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bdfbef2d29dcdc79e2abf3085d4be6a844a06e34'/>
<id>urn:sha1:bdfbef2d29dcdc79e2abf3085d4be6a844a06e34</id>
<content type='text'>
The selection 0 is a perfectly valid, so stop using it to have
the special meaning of interrupt line not used in the intr_lines.

Instead introduce a special CHV_INVALID_HWIRQ value, derived
from INVALID_HWIRQ. which is never a valid selection and use
that to indicate unused interrupt lines.

Cc: Yauhen Kharuzhy &lt;jekhor@gmail.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: baytrail: Set IRQCHIP_SET_TYPE_MASKED flag on the irqchip</title>
<updated>2021-11-23T13:38:49Z</updated>
<author>
<name>Hans de Goede</name>
<email>hdegoede@redhat.com</email>
</author>
<published>2021-11-22T22:04:23Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6b4542664c2d1fc7a770f0a4182ef5e36672d313'/>
<id>urn:sha1:6b4542664c2d1fc7a770f0a4182ef5e36672d313</id>
<content type='text'>
The byt_irq_type function ends with the IRQ masked, this means that calls
to irq_set_irq_type() while the IRQ is enabled end up masking it, which
is wrong. Add the IRQCHIP_SET_TYPE_MASKED flag to fix this.

This will make the IRQ core call mask() + unmask() on the IRQ around
a set_type() call when the IRQ is enabled at the type of the call.

Note in practice irq_set_irq_type() getting called while the IRQ is enabled
almost never happens. I hit this with a buggy DSDT where a wrongly active
(_STA returns 0xf) I2C ACPI devices point to an IRQ already in use by an
_AEI handler, leading to the irq_set_irq_type() call in
acpi_dev_gpio_irq_get_by() getting called while the IRQ is enabled.

Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
</content>
</entry>
</feed>
