linux/drivers/pinctrl/intel, branch v5.8

pinctrl: baytrail: Fix pin being driven low for a while on gpiod_get(..., GPIOD_OUT_HIGH)

2020-06-26T11:20:00Z

The pins on the Bay Trail SoC have separate input-buffer and output-buffer enable bits and a read of the level bit of the value register will always return the value from the input-buffer. The BIOS of a device may configure a pin in output-only mode, only enabling the output buffer, and write 1 to the level bit to drive the pin high. This 1 written to the level bit will be stored inside the data-latch of the output buffer. But a subsequent read of the value register will return 0 for the level bit because the input-buffer is disabled. This causes a read-modify-write as done by byt_gpio_set_direction() to write 0 to the level bit, driving the pin low! Before this commit byt_gpio_direction_output() relied on pinctrl_gpio_direction_output() to set the direction, followed by a call to byt_gpio_set() to apply the selected value. This causes the pin to go low between the pinctrl_gpio_direction_output() and byt_gpio_set() calls. Change byt_gpio_direction_output() to directly make the register modifications itself instead. Replacing the 2 subsequent writes to the value register with a single write. Note that the pinctrl code does not keep track internally of the direction, so not going through pinctrl_gpio_direction_output() is not an issue. This issue was noticed on a Trekstor SurfTab Twin 10.1. When the panel is already on at boot (no external monitor connected), then the i915 driver does a gpiod_get(..., GPIOD_OUT_HIGH) for the panel-enable GPIO. The temporarily going low of that GPIO was causing the panel to reset itself after which it would not show an image until it was turned off and back on again (until a full modeset was done on it). This commit fixes this. This commit also updates the byt_gpio_direction_input() to use direct register accesses instead of going through pinctrl_gpio_direction_input(), to keep it consistent with byt_gpio_direction_output(). Note for backporting, this commit depends on: commit e2b74419e5cc ("pinctrl: baytrail: Replace WARN with dev_info_once when setting direct-irq pin to output") Cc: stable@vger.kernel.org Fixes: 86e3ef812fe3 ("pinctrl: baytrail: Update gpio chip operations") Signed-off-by: Hans de Goede Acked-by: Mika Westerberg Signed-off-by: Andy Shevchenko

pinctrl: intel: Move npins closer to pin_base in struct intel_community

2020-04-22T11:20:00Z

It's common across the drivers to use the (pin_base, npins) pair to describe community characteristics. Thus, move them in the struct intel_community to be closer to each other. While at it, add a blank line to cut driver usable fields from what core reserves for itself. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg

pinctrl: intel: Update description in struct intel_community

2020-04-22T11:19:03Z

It appears that most of the drivers, that are using struct intel_community, utilize gpps rather than gpp_size. Update comment accordingly. While here, correct the description of gpp_size, i.e. remove double space and drop redundant 'etc.' part. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg

pinctrl: cherryview: Add missing spinlock usage in chv_gpio_irq_handler

2020-04-17T11:36:22Z

According to Braswell NDA Specification Update (#557593), concurrent read accesses may result in returning 0xffffffff and write instructions may be dropped. We have an established format for the commit references, i.e. cdca06e4e859 ("pinctrl: baytrail: Add missing spinlock usage in byt_gpio_irq_handler") Fixes: 0bd50d719b00 ("pinctrl: cherryview: prevent concurrent access to GPIO controllers") Signed-off-by: Grace Kao Reported-by: Brian Norris Reviewed-by: Brian Norris Acked-by: Mika Westerberg Signed-off-by: Andy Shevchenko

pinctrl: lynxpoint: Use platform_get_irq_optional() explicitly

2020-04-16T15:54:34Z

There is no need to repeat functionality of platform_get_irq_optional() in the driver. Replace it with explicit call to the helper. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg Reviewed-by: Linus Walleij

pinctrl: baytrail: Use platform_get_irq_optional() explicitly

2020-04-15T15:30:39Z

There is no need to repeat functionality of platform_get_irq_optional() in the driver. Replace it with explicit call to the helper. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg

pinctrl: intel: Add Intel Jasper Lake pin controller support

2020-04-14T13:17:13Z

This driver adds pinctrl/GPIO support for Intel Jasper Lake SoC. The GPIO controller is based on the next generation GPIO hardware but still compatible with the one supported by the Intel core pinctrl/GPIO driver. Cc: Mika Westerberg Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg

pinctrl: intel: Introduce new flag to force GPIO base to be 0

2020-04-14T13:17:13Z

In some cases not the first group would like to have GPIO base to be 0. It's not possible right now due to 0 has special meaning already. Thus, introduce a new flag to allow drivers to force GPIO base to be 0 on a certain group. It's assumed that it can be only one group per device with such flag enabled. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg

pinctrl: tigerlake: Use generic flag for special GPIO base treatment

2020-04-14T13:17:13Z

Since we have a generic flag for special GPIO base treatment, use it in the driver. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg

pinctrl: icelake: Use generic flag for special GPIO base treatment

2020-04-14T13:17:13Z

Since we have a generic flag for special GPIO base treatment, use it in the driver. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg