<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/pinctrl/qcom/Kconfig, branch master</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=master</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=master'/>
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<updated>2026-04-07T07:01:55Z</updated>
<entry>
<title>pinctrl: qcom: add sdm670 lpi tlmm</title>
<updated>2026-04-07T07:01:55Z</updated>
<author>
<name>Richard Acayan</name>
<email>mailingradian@gmail.com</email>
</author>
<published>2026-03-31T20:06:57Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9826035a75da609ac2424c97915d6fe5b836ee65'/>
<id>urn:sha1:9826035a75da609ac2424c97915d6fe5b836ee65</id>
<content type='text'>
The Snapdragon 670 has an Low-Power Island (LPI) TLMM for configuring
pins related to audio. Add the driver for this.

Signed-off-by: Richard Acayan &lt;mailingradian@gmail.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: Add Milos LPASS LPI TLMM</title>
<updated>2026-03-10T11:27:17Z</updated>
<author>
<name>Luca Weiss</name>
<email>luca.weiss@fairphone.com</email>
</author>
<published>2026-03-06T14:22:16Z</published>
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<id>urn:sha1:ca0395d9ef294a4340104107177de23e04de2344</id>
<content type='text'>
Add a driver for the pin controller in the Low Power Audio SubSystem
(LPASS) on the Milos SoC.

Signed-off-by: Luca Weiss &lt;luca.weiss@fairphone.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: sm8350-lpass-lpi: Merge with SC7280 to fix I2S2 and SWR TX pins</title>
<updated>2026-01-19T00:13:22Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@oss.qualcomm.com</email>
</author>
<published>2026-01-08T10:07:22Z</published>
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<id>urn:sha1:1fbe3abb449c5ef2178e1c3e3e8b9a43a7a410ac</id>
<content type='text'>
Qualcomm SC7280 and SM8350 SoCs have slightly different LPASS audio
blocks (v9.4.5 and v9.2), however the LPASS LPI pin controllers are
exactly the same.  The driver for SM8350 has two issues, which can be
fixed by simply moving over to SC7280 driver which has them correct:

1. "i2s2_data_groups" listed twice GPIO12, but should have both GPIO12
   and GPIO13,

2. "swr_tx_data_groups" contained GPIO5 for "swr_tx_data2" function, but
   that function is also available on GPIO14, thus listing it twice is
   not necessary.  OTOH, GPIO5 has also "swr_rx_data1", so selecting
   swr_rx_data function should not block  the TX one.

Fixes: be9f6d56381d ("pinctrl: qcom: sm8350-lpass-lpi: add SM8350 LPASS TLMM")
Cc: stable@vger.kernel.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Reviewed-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: Add SDM660 LPASS LPI TLMM</title>
<updated>2025-09-10T13:35:42Z</updated>
<author>
<name>Richard Acayan</name>
<email>mailingradian@gmail.com</email>
</author>
<published>2025-09-08T12:28:46Z</published>
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<id>urn:sha1:5e302106099efc8a309d92ad84cb37d35d6c3775</id>
<content type='text'>
The Snapdragon 660 has a Low-Power Island (LPI) TLMM for configuring
pins related to audio. Add the driver for this.
Also, this driver uses predefined pin_offsets for each pin taken from
downstream driver, which does not follow the usual 0x1000 distance
between pins and uses an array with predefined offsets that do not
follow any regular pattern [1].

[1] https://git.codelinaro.org/clo/la/kernel/msm-4.4/-/blob/LA.UM.7.2.c27-07400-sdm660.0/drivers/pinctrl/qcom/pinctrl-lpi.c#L107

Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Signed-off-by: Richard Acayan &lt;mailingradian@gmail.com&gt;
Co-developed-by: Nickolay Goppen &lt;setotau@mainlining.org&gt;
Signed-off-by: Nickolay Goppen &lt;setotau@mainlining.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: use generic pin function helpers</title>
<updated>2025-09-08T12:22:50Z</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>bartosz.golaszewski@linaro.org</email>
</author>
<published>2025-09-02T11:59:21Z</published>
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<id>urn:sha1:6f6835beab99c770f1cc6de99b3e3b73c333dec7</id>
<content type='text'>
With the pinmux core no longer duplicating memory used to store the
struct pinfunction objects in .rodata, we can now use the existing
infrastructure for storing and looking up pin functions in qualcomm
drivers. Remove hand-crafted callbacks.

Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Tested-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: Introduce SM4250 LPI pinctrl driver</title>
<updated>2024-06-26T10:41:07Z</updated>
<author>
<name>Srinivas Kandagatla</name>
<email>srinivas.kandagatla@linaro.org</email>
</author>
<published>2024-06-22T16:49:31Z</published>
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<id>urn:sha1:c2e5a25e8d880638d771b19899b5a76feb8b82a0</id>
<content type='text'>
Add support for the pin controller block on SM4250 Low Power Island.

Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Link: https://lore.kernel.org/20240612-sm4250-lpi-v4-2-a0342e47e21b@linaro.org
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: sm8650-lpass-lpi: correct Kconfig name</title>
<updated>2024-02-21T22:00:57Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2024-02-16T10:24:35Z</published>
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<id>urn:sha1:47847b9bcdb13c2da1829323a66651ef63047b77</id>
<content type='text'>
Use proper model name in SM8650 LPASS pin controller Kconfig entry.

Cc:  &lt;stable@vger.kernel.org&gt;
Fixes: c4e47673853f ("pinctrl: qcom: sm8650-lpass-lpi: add SM8650 LPASS")
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Link: https://lore.kernel.org/r/20240216102435.89867-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: sm8650-lpass-lpi: add SM8650 LPASS</title>
<updated>2023-11-13T13:58:02Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2023-10-27T09:36:15Z</published>
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<id>urn:sha1:c4e47673853f2b020e2390832e9df83b3a84d7b0</id>
<content type='text'>
Add driver for the pin controller in Low Power Audio SubSystem (LPASS)
of Qualcomm SM8650 SoC.

Notable differences against SM8550 LPASS pin controller:
1. Additional address space for slew rate thus driver uses
   LPI_FLAG_SLEW_RATE_SAME_REG and sets slew rate via different
   register.

2. Two new pin mux functions: qca_swr_clk and qca_swr_data

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;
Link: https://lore.kernel.org/r/20231027093615.140656-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: Introduce SM6115 LPI pinctrl driver</title>
<updated>2023-07-26T09:09:47Z</updated>
<author>
<name>Konrad Dybcio</name>
<email>konrad.dybcio@linaro.org</email>
</author>
<published>2023-07-24T11:39:57Z</published>
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<id>urn:sha1:63f7c8445ffe6667ac4cc9720ca36ad7d407709f</id>
<content type='text'>
Add support for the pin controller block on SM6115's Low Power Island.

Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;
Link: https://lore.kernel.org/r/20230722-topic-6115_lpasstlmm-v2-2-d4883831a858@linaro.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: sm8350-lpass-lpi: add SM8350 LPASS TLMM</title>
<updated>2023-07-24T19:07:04Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2023-07-19T19:20:57Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=be9f6d56381d995f600524ad99fa8a9cc5bd5c49'/>
<id>urn:sha1:be9f6d56381d995f600524ad99fa8a9cc5bd5c49</id>
<content type='text'>
Add driver for pin controller in Low Power Audio SubSystem (LPASS).  The
driver is similar to SM8250 LPASS pin controller, with difference in one
new pin (gpio14) belonging to swr_tx_data.

Link: https://lore.kernel.org/r/20230719192058.433517-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</content>
</entry>
</feed>
