<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/pinctrl/qcom, branch v6.19</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.19</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.19'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2026-01-27T09:06:27Z</updated>
<entry>
<title>pinctrl: lpass-lpi: implement .get_direction() for the GPIO driver</title>
<updated>2026-01-27T09:06:27Z</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>bartosz.golaszewski@oss.qualcomm.com</email>
</author>
<published>2026-01-26T13:56:27Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4f0d22ec60cee420125f4055af76caa0f373a3fe'/>
<id>urn:sha1:4f0d22ec60cee420125f4055af76caa0f373a3fe</id>
<content type='text'>
GPIO controller driver should typically implement the .get_direction()
callback as GPIOLIB internals may try to use it to determine the state
of a pin. Add it for the LPASS LPI driver.

Reported-by: Abel Vesa &lt;abelvesa@kernel.org&gt;
Cc: stable@vger.kernel.org
Fixes: 6e261d1090d6 ("pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver")
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Tested-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt; # X1E CRD
Tested-by: Abel Vesa &lt;abel.vesa@oss.qualcomm.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: sm8350-lpass-lpi: Merge with SC7280 to fix I2S2 and SWR TX pins</title>
<updated>2026-01-19T00:13:22Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@oss.qualcomm.com</email>
</author>
<published>2026-01-08T10:07:22Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1fbe3abb449c5ef2178e1c3e3e8b9a43a7a410ac'/>
<id>urn:sha1:1fbe3abb449c5ef2178e1c3e3e8b9a43a7a410ac</id>
<content type='text'>
Qualcomm SC7280 and SM8350 SoCs have slightly different LPASS audio
blocks (v9.4.5 and v9.2), however the LPASS LPI pin controllers are
exactly the same.  The driver for SM8350 has two issues, which can be
fixed by simply moving over to SC7280 driver which has them correct:

1. "i2s2_data_groups" listed twice GPIO12, but should have both GPIO12
   and GPIO13,

2. "swr_tx_data_groups" contained GPIO5 for "swr_tx_data2" function, but
   that function is also available on GPIO14, thus listing it twice is
   not necessary.  OTOH, GPIO5 has also "swr_rx_data1", so selecting
   swr_rx_data function should not block  the TX one.

Fixes: be9f6d56381d ("pinctrl: qcom: sm8350-lpass-lpi: add SM8350 LPASS TLMM")
Cc: stable@vger.kernel.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Reviewed-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: lpass-lpi: mark the GPIO controller as sleeping</title>
<updated>2026-01-01T14:40:56Z</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>bartosz.golaszewski@linaro.org</email>
</author>
<published>2025-11-26T12:22:19Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ebc18e9854e5a2b62a041fb57b216a903af45b85'/>
<id>urn:sha1:ebc18e9854e5a2b62a041fb57b216a903af45b85</id>
<content type='text'>
The gpio_chip settings in this driver say the controller can't sleep
but it actually uses a mutex for synchronization. This triggers the
following BUG():

[    9.233659] BUG: sleeping function called from invalid context at kernel/locking/mutex.c:281
[    9.233665] in_atomic(): 1, irqs_disabled(): 1, non_block: 0, pid: 554, name: (udev-worker)
[    9.233669] preempt_count: 1, expected: 0
[    9.233673] RCU nest depth: 0, expected: 0
[    9.233688] Tainted: [W]=WARN
[    9.233690] Hardware name: Dell Inc. Latitude 7455/0FK7MX, BIOS 2.10.1 05/20/2025
[    9.233694] Call trace:
[    9.233696]  show_stack+0x24/0x38 (C)
[    9.233709]  dump_stack_lvl+0x40/0x88
[    9.233716]  dump_stack+0x18/0x24
[    9.233722]  __might_resched+0x148/0x160
[    9.233731]  __might_sleep+0x38/0x98
[    9.233736]  mutex_lock+0x30/0xd8
[    9.233749]  lpi_config_set+0x2e8/0x3c8 [pinctrl_lpass_lpi]
[    9.233757]  lpi_gpio_direction_output+0x58/0x90 [pinctrl_lpass_lpi]
[    9.233761]  gpiod_direction_output_raw_commit+0x110/0x428
[    9.233772]  gpiod_direction_output_nonotify+0x234/0x358
[    9.233779]  gpiod_direction_output+0x38/0xd0
[    9.233786]  gpio_shared_proxy_direction_output+0xb8/0x2a8 [gpio_shared_proxy]
[    9.233792]  gpiod_direction_output_raw_commit+0x110/0x428
[    9.233799]  gpiod_direction_output_nonotify+0x234/0x358
[    9.233806]  gpiod_configure_flags+0x2c0/0x580
[    9.233812]  gpiod_find_and_request+0x358/0x4f8
[    9.233819]  gpiod_get_index+0x7c/0x98
[    9.233826]  devm_gpiod_get+0x34/0xb0
[    9.233829]  reset_gpio_probe+0x58/0x128 [reset_gpio]
[    9.233836]  auxiliary_bus_probe+0xb0/0xf0
[    9.233845]  really_probe+0x14c/0x450
[    9.233853]  __driver_probe_device+0xb0/0x188
[    9.233858]  driver_probe_device+0x4c/0x250
[    9.233863]  __driver_attach+0xf8/0x2a0
[    9.233868]  bus_for_each_dev+0xf8/0x158
[    9.233872]  driver_attach+0x30/0x48
[    9.233876]  bus_add_driver+0x158/0x2b8
[    9.233880]  driver_register+0x74/0x118
[    9.233886]  __auxiliary_driver_register+0x94/0xe8
[    9.233893]  init_module+0x34/0xfd0 [reset_gpio]
[    9.233898]  do_one_initcall+0xec/0x300
[    9.233903]  do_init_module+0x64/0x260
[    9.233910]  load_module+0x16c4/0x1900
[    9.233915]  __arm64_sys_finit_module+0x24c/0x378
[    9.233919]  invoke_syscall+0x4c/0xe8
[    9.233925]  el0_svc_common+0x8c/0xf0
[    9.233929]  do_el0_svc+0x28/0x40
[    9.233934]  el0_svc+0x38/0x100
[    9.233938]  el0t_64_sync_handler+0x84/0x130
[    9.233943]  el0t_64_sync+0x17c/0x180

Mark the controller as sleeping.

Fixes: 6e261d1090d6 ("pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver")
Cc: stable@vger.kernel.org
Reported-by: Val Packett &lt;val@packett.cool&gt;
Closes: https://lore.kernel.org/all/98c0f185-b0e0-49ea-896c-f3972dd011ca@packett.cool/
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Reviewed-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'pinctrl-v6.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl</title>
<updated>2025-12-08T21:45:00Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-12-08T21:45:00Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a110f942672c8995dc1cacb5a44c6730856743aa'/>
<id>urn:sha1:a110f942672c8995dc1cacb5a44c6730856743aa</id>
<content type='text'>
Pull pin control updates from Linus Walleij:
 "The technical details below. For me the CIX Semi and Axis
  Communications ARTPEC-9 SoCs were the most interesting new drivers in
  this merge window.

  Core changes:

   - Handle per-direction skew control in the generic pin config

   - Drop the pointless subsystem boilerplate banner message during
     boot. Less noise in the console. It's available as debug message if
     someone really want it

  New drivers:

   - Samsung Exynos 8890 SoC support

   - Samsung Exynos derived Axis Communications ARTPEC-9 SoC support.
     These guys literally live next door to me, ARTPEC spells out "Axis
     Real-Time Picture Encoding Chip" and is tailored for camera image
     streams and is something they have evolved for a quarter of a
     century

   - Mediatek MT6878 SoC support

   - Qualcomm Glymur PMIC support (mostly just compatible strings)

   - Qualcomm Kaanapali SoC TLMM support

   - Microchip pic64gx "gpio2" SoC support

   - Microchip Polarfire "iomux0" SoC support

   - CIX Semiconductors SKY1 SoC support

   - Rockchip RK3506 SoC support

   - Airhoa AN7583 chip support

  Improvements:

   - Improvements for ST Microelectronics STM32 handling of skew
     settings so input and output can have different skew settings

   - A whole bunch of device tree binding cleanups: Marvell Armada and
     Berlin, Actions Semiconductor S700 and S900, Broadcom Northstar 2
     (NS2), Bitmain BM1880 and Spreadtrum SC9860 are moved over to
     schema"

* tag 'pinctrl-v6.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (107 commits)
  pinctrl: add CONFIG_OF dependencies for microchip drivers
  pinctrl: starfive: use dynamic GPIO base allocation
  pinctrl: single: Fix incorrect type for error return variable
  MAINTAINERS: Change Linus Walleij mail address
  pinctrl: cix: Fix obscure dependency
  dt-bindings: pinctrl: cix,sky1-pinctrl: Drop duplicate newline
  dt-bindings: pinctrl: aspeed,ast2600-pinctrl: Add PCIe RC PERST# group
  pinctrl: airoha: Fix AIROHA_PINCTRL_CONFS_DRIVE_E2 in an7583_pinctrl_match_data
  pinctrl: airoha: fix pinctrl function mismatch issue
  pinctrl: cherryview: Convert to use intel_gpio_add_pin_ranges()
  pinctrl: intel: Export intel_gpio_add_pin_ranges()
  pinctrl: renesas: rzg2l: Refactor OEN register PWPR handling
  pinctrl: airoha: convert comma to semicolon
  pinctrl: elkhartlake: Switch to INTEL_GPP() macro
  pinctrl: cherryview: Switch to INTEL_GPP() macro
  pinctrl: emmitsburg: Switch to INTEL_GPP() macro
  pinctrl: denverton: Switch to INTEL_GPP() macro
  pinctrl: cedarfork: Switch to INTEL_GPP() macro
  pinctrl: airoha: add support for Airoha AN7583 PINs
  dt-bindings: pinctrl: airoha: Document AN7583 Pin Controller
  ...
</content>
</entry>
<entry>
<title>pinctrl: qcom: msm: Fix deadlock in pinmux configuration</title>
<updated>2025-11-12T12:41:34Z</updated>
<author>
<name>Praveen Talari</name>
<email>praveen.talari@oss.qualcomm.com</email>
</author>
<published>2025-11-10T10:10:41Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1c2e70397b4125022dba80f6111271a37fb36bae'/>
<id>urn:sha1:1c2e70397b4125022dba80f6111271a37fb36bae</id>
<content type='text'>
Replace disable_irq() with disable_irq_nosync() in msm_pinmux_set_mux()
to prevent deadlock when wakeup IRQ is triggered on the same
GPIO being reconfigured.

The issue occurs when a wakeup IRQ is triggered on a GPIO and the IRQ
handler attempts to reconfigure the same GPIO's pinmux. In this scenario,
msm_pinmux_set_mux() calls disable_irq() which waits for the currently
running IRQ handler to complete, creating a circular dependency that
results in deadlock.

Using disable_irq_nosync() avoids waiting for the IRQ handler to
complete, preventing the deadlock condition while still properly
disabling the interrupt during pinmux reconfiguration.

Suggested-by: Prasad Sodagudi &lt;prasad.sodagudi@oss.qualcomm.com&gt;
Signed-off-by: Praveen Talari &lt;praveen.talari@oss.qualcomm.com&gt;
Reviewed-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: add the tlmm driver for Kaanapali platforms</title>
<updated>2025-10-13T10:26:05Z</updated>
<author>
<name>Jingyi Wang</name>
<email>jingyi.wang@oss.qualcomm.com</email>
</author>
<published>2025-09-24T23:16:04Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=35ff9c6b318af715f54dc2053b328ca7bfb2c00f'/>
<id>urn:sha1:35ff9c6b318af715f54dc2053b328ca7bfb2c00f</id>
<content type='text'>
Add support for Kaanapali TLMM configuration and control via the pinctrl
framework.

Signed-off-by: Jingyi Wang &lt;jingyi.wang@oss.qualcomm.com&gt;
Reviewed-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
Reviewed-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: spmi-gpio: add support for {LV_VIN2, MV_VIN3}_CLK subtypes</title>
<updated>2025-10-13T10:20:00Z</updated>
<author>
<name>Subbaraman Narayanamurthy</name>
<email>subbaraman.narayanamurthy@oss.qualcomm.com</email>
</author>
<published>2025-09-24T17:01:04Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bfdccbe92e6de5a4b468343cbca3143b89df99af'/>
<id>urn:sha1:bfdccbe92e6de5a4b468343cbca3143b89df99af</id>
<content type='text'>
Add support for SPMI PMIC GPIO subtypes GPIO_LV_VIN2_CLK and
GPIO_MV_VIN3_CLK.

Signed-off-by: Subbaraman Narayanamurthy &lt;subbaraman.narayanamurthy@oss.qualcomm.com&gt;
Signed-off-by: Jishnu Prakash &lt;jishnu.prakash@oss.qualcomm.com&gt;
Signed-off-by: Kamal Wadhwa &lt;kamal.wadhwa@oss.qualcomm.com&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: spmi-gpio: Add PMCX0102, PMK8850 &amp; PMH01XX PMICs support</title>
<updated>2025-10-13T10:20:00Z</updated>
<author>
<name>Anjelique Melendez</name>
<email>anjelique.melendez@oss.qualcomm.com</email>
</author>
<published>2025-09-24T17:01:03Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=120b6d1a22ee46dcf35e21949ddce6fe736550f0'/>
<id>urn:sha1:120b6d1a22ee46dcf35e21949ddce6fe736550f0</id>
<content type='text'>
Add support for PMCX0102, PMH0101, PMH0104, PMH0110 and PMK8850 PMIC
GPIOs with adding appropriate compatible strings.

Signed-off-by: Anjelique Melendez &lt;anjelique.melendez@oss.qualcomm.com&gt;
Signed-off-by: Jishnu Prakash &lt;jishnu.prakash@oss.qualcomm.com&gt;
Signed-off-by: Kamal Wadhwa &lt;kamal.wadhwa@oss.qualcomm.com&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: glymur: Fix the gpio and egpio pin functions</title>
<updated>2025-10-13T10:15:50Z</updated>
<author>
<name>Abel Vesa</name>
<email>abel.vesa@linaro.org</email>
</author>
<published>2025-09-19T12:17:12Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e73fda2dcb0bad6650e654556c5242b773707257'/>
<id>urn:sha1:e73fda2dcb0bad6650e654556c5242b773707257</id>
<content type='text'>
Mark the gpio/egpio as GPIO specific pin functions, othewise
the pin muxing generic framework will complain about the gpio
being already requested by a different owner.

Fixes: 87ebcd8baebf ("pinctrl: qcom: Add glymur pinctrl driver")
Signed-off-by: Abel Vesa &lt;abel.vesa@linaro.org&gt;
Reviewed-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: glymur: Drop unnecessary platform data from match table</title>
<updated>2025-10-13T10:15:50Z</updated>
<author>
<name>Abel Vesa</name>
<email>abel.vesa@linaro.org</email>
</author>
<published>2025-09-19T12:17:11Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=37e7b536061a33c8f27030e3ffc5a717a6c319e3'/>
<id>urn:sha1:37e7b536061a33c8f27030e3ffc5a717a6c319e3</id>
<content type='text'>
The platform specific configuration is already passed on to the generic
msm probe. So it's useless to exist in the match table next to the
compatible. So drop it from match table.

Fixes: 87ebcd8baebf ("pinctrl: qcom: Add glymur pinctrl driver")
Signed-off-by: Abel Vesa &lt;abel.vesa@linaro.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
</feed>
