<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/pinctrl, branch v6.0</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.0</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.0'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2022-09-14T13:00:16Z</updated>
<entry>
<title>pinctrl: ocelot: Fix interrupt controller</title>
<updated>2022-09-14T13:00:16Z</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2022-09-09T14:59:42Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c297561bc98ad0f2a37ce0178ee3ba89ab586d70'/>
<id>urn:sha1:c297561bc98ad0f2a37ce0178ee3ba89ab586d70</id>
<content type='text'>
When an external device generated a level based interrupt then the
interrupt controller could miss the interrupt. The reason is that the
interrupt controller can detect only link changes.

In the following example, if there is a PHY that generates an interrupt
then the following would happen. The GPIO detected that the interrupt
line changed, and then the 'ocelot_irq_handler' was called. Here it
detects which GPIO line saw the change and for that will call the
following:
1. irq_mask
2. phy interrupt routine
3. irq_eoi
4. irq_unmask

And this works fine for simple cases, but if the PHY generates many
interrupts, for example when doing PTP timestamping, then the following
could happen. Again the function 'ocelot_irq_handler' will be called
and then from here the following could happen:
1. irq_mask
2. phy interrupt routine
3. irq_eoi
4. irq_unmask

Right before step 3(irq_eoi), the PHY will generate another interrupt.
Now the interrupt controller will acknowledge the change in the
interrupt line. So we miss the interrupt.

A solution will be to use 'handle_level_irq' instead of
'handle_fasteoi_irq', because for this will change routine order of
handling the interrupt.
1. irq_mask
2. irq_ack
3. phy interrupt routine
4. irq_unmask

And now if the PHY will generate a new interrupt before irq_unmask, the
interrupt controller will detect this because it already acknowledge the
change in interrupt line at step 2(irq_ack).

But this is not the full solution because there is another issue. In
case there are 2 PHYs that share the interrupt line. For example phy1
generates an interrupt, then the following can happen:
1.irq_mask
2.irq_ack
3.phy0 interrupt routine
4.phy1 interrupt routine
5.irq_unmask

In case phy0 will generate an interrupt while clearing the interrupt
source in phy1, then the interrupt line will be kept down by phy0. So
the interrupt controller will not see any changes in the interrupt line.
The solution here is to update 'irq_unmask' such that it can detect if
the interrupt line is still active or not. And if it is active then call
again the procedure to clear the interrupts. But we don't want to do it
every time, only if we know that the interrupt controller has not seen
already that the interrupt line has changed.

While at this, add support also for IRQ_TYPE_LEVEL_LOW.

Fixes: be36abb71d878f ("pinctrl: ocelot: add support for interrupt controller")
Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
Link: https://lore.kernel.org/r/20220909145942.844102-1-horatiu.vultur@microchip.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: sunxi: Fix name for A100 R_PIO</title>
<updated>2022-08-26T08:37:24Z</updated>
<author>
<name>Michael Wu</name>
<email>michael@allwinnertech.com</email>
</author>
<published>2022-08-19T02:45:41Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=76648c867c6c03b8a468d9c9222025873ecc613d'/>
<id>urn:sha1:76648c867c6c03b8a468d9c9222025873ecc613d</id>
<content type='text'>
The name of A100 R_PIO driver should be sun50i-a100-r-pinctrl,
not sun50iw10p1-r-pinctrl.

Fixes: 473436e7647d6 ("pinctrl: sunxi: add support for the Allwinner A100 pin controller")
Signed-off-by: Michael Wu &lt;michael@allwinnertech.com&gt;
Acked-by: Samuel Holland &lt;samuel@sholland.org&gt;
Link: https://lore.kernel.org/r/20220819024541.74191-1-michael@allwinnertech.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: sc8180x: Fix wrong pin numbers</title>
<updated>2022-08-22T08:57:07Z</updated>
<author>
<name>Molly Sophia</name>
<email>mollysophia379@gmail.com</email>
</author>
<published>2022-08-07T12:26:45Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=48ec73395887694f13c9452b4dcfb43710451757'/>
<id>urn:sha1:48ec73395887694f13c9452b4dcfb43710451757</id>
<content type='text'>
The pin numbers for UFS_RESET and SDC2_* are not
consistent in the pinctrl driver for sc8180x.
So fix it.

Signed-off-by: Molly Sophia &lt;mollysophia379@gmail.com&gt;
Fixes: 97423113ec4b ("pinctrl: qcom: Add sc8180x TLMM driver")
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20220807122645.13830-3-mollysophia379@gmail.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: sc8180x: Fix gpio_wakeirq_map</title>
<updated>2022-08-22T08:57:06Z</updated>
<author>
<name>Molly Sophia</name>
<email>mollysophia379@gmail.com</email>
</author>
<published>2022-08-07T12:26:44Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6124cec530c7d8faab96d340ab2df5161e5d1c8a'/>
<id>urn:sha1:6124cec530c7d8faab96d340ab2df5161e5d1c8a</id>
<content type='text'>
Currently in the wakeirq_map, gpio36 and gpio37 have the same wakeirq
number, resulting in gpio37 being unable to trigger interrupts.
It looks like that this is a typo in the wakeirq map. So fix it.

Signed-off-by: Molly Sophia &lt;mollysophia379@gmail.com&gt;
Fixes: 97423113ec4b ("pinctrl: qcom: Add sc8180x TLMM driver")
Tested-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20220807122645.13830-2-mollysophia379@gmail.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'pinctrl-v6.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl</title>
<updated>2022-08-10T18:01:44Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-08-10T18:01:44Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5e2e7383b57fa03ec2b00c82bb7f49a4a707c1f7'/>
<id>urn:sha1:5e2e7383b57fa03ec2b00c82bb7f49a4a707c1f7</id>
<content type='text'>
Pull pin control updates from Linus Walleij:
 "Outside the pinctrl driver and DT bindings we hit some Arm DT files,
  patched by the maintainers.

  Other than that it is business as usual.

  Core changes:

   - Add PINCTRL_PINGROUP() helper macro (and use it in the AMD driver).

  New drivers:

   - Intel Meteor Lake support.

   - Reneasas RZ/V2M and r8a779g0 (R-Car V4H).

   - AXP209 variants AXP221, AXP223 and AXP809.

   - Qualcomm MSM8909, PM8226, PMP8074 and SM6375.

   - Allwinner D1.

  Improvements:

   - Proper pin multiplexing in the AMD driver.

   - Mediatek MT8192 can use generic drive strength and pin bias, then
     fixes on top plus some I2C pin group fixes.

   - Have the Allwinner Sunplus SP7021 use the generic DT schema and
     make interrupts optional.

   - Handle Qualcomm SC7280 ADSP.

   - Handle Qualcomm MSM8916 CAMSS GP clock muxing.

   - High impedance bias on ZynqMP.

   - Serialize StarFive access to MMIO.

   - Immutable gpiochip for BCM2835, Ingenic, Qualcomm SPMI GPIO"

* tag 'pinctrl-v6.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (117 commits)
  dt-bindings: pinctrl: qcom,pmic-gpio: add PM8226 constraints
  pinctrl: qcom: Make PINCTRL_SM8450 depend on PINCTRL_MSM
  pinctrl: qcom: sm8250: Fix PDC map
  pinctrl: amd: Fix an unused variable
  dt-bindings: pinctrl: mt8186: Add and use drive-strength-microamp
  dt-bindings: pinctrl: mt8186: Add gpio-line-names property
  ARM: dts: imxrt1170-pinfunc: Add pinctrl binding header
  pinctrl: amd: Use unicode for debugfs output
  pinctrl: amd: Fix newline declaration in debugfs output
  pinctrl: at91: Fix typo 'the the' in comment
  dt-bindings: pinctrl: st,stm32: Correct 'resets' property name
  pinctrl: mvebu: Missing a blank line after declarations.
  pinctrl: qcom: Add SM6375 TLMM driver
  dt-bindings: pinctrl: Add DT schema for SM6375 TLMM
  dt-bindings: pinctrl: mt8195: Use drive-strength-microamp in examples
  Revert "pinctrl: qcom: spmi-gpio: make the irqchip immutable"
  pinctrl: imx93: Add MODULE_DEVICE_TABLE()
  pinctrl: sunxi: Add driver for Allwinner D1
  pinctrl: sunxi: Make some layout parameters dynamic
  pinctrl: sunxi: Refactor register/offset calculation
  ...
</content>
</entry>
<entry>
<title>Merge tag 'platform-drivers-x86-v6.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86</title>
<updated>2022-08-05T01:19:14Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-08-05T01:19:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5f0848190c6dd0f5b8a2aaf0f1d900a96d96bee0'/>
<id>urn:sha1:5f0848190c6dd0f5b8a2aaf0f1d900a96d96bee0</id>
<content type='text'>
Pull x86 platform driver updates from Hans de Goede:

 - Microsoft Surface:
     - SSAM hot unplug support
     - Surface Pro 8 keyboard cover support
     - Tablet mode switch support for Surface Pro 8 and Surface Laptop
       Studio

 - thinkpad_acpi:
     - AMD Automatice Mode Transitions (AMT) support

 - Mellanox:
     - Vulcan chassis COMe NVSwitch management support
     - XH3000 support

 - New generic/shared Intel P2SB (Primary to Sideband) support

 - Lots of small cleanups

 - Various small bugfixes

 - Various new hardware ids / quirks additions

* tag 'platform-drivers-x86-v6.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86: (105 commits)
  platform/x86/intel/vsec: Fix wrong type for local status variables
  platform/x86: p2sb: Move out of X86_PLATFORM_DEVICES dependency
  platform/x86: pmc_atom: Fix comment typo
  platform/surface: gpe: Add support for 13" Intel version of Surface Laptop 4
  platform/olpc: Fix uninitialized data in debugfs write
  platform/mellanox: mlxreg-lc: Fix error flow and extend verbosity
  platform/x86: pmc_atom: Match all Lex BayTrail boards with critclk_systems DMI table
  platform/x86: sony-laptop: Remove useless comparisons in sony_pic_read_possible_resource()
  tools/power/x86/intel-speed-select: Remove unneeded semicolon
  tools/power/x86/intel-speed-select: Fix off by one check
  platform/surface: tabletsw: Fix __le32 integer access
  Documentation/ABI: Add new attributes for mlxreg-io sysfs interfaces
  Documentation/ABI: mlxreg-io: Fix contact info
  platform/mellanox: mlxreg-io: Add locking for io operations
  platform/x86: mlx-platform: Add COME board revision register
  platform/x86: mlx-platform: Add support for new system XH3000
  platform/x86: mlx-platform: Introduce support for COMe NVSwitch management module for Vulcan chassis
  platform/x86: mlx-platform: Add support for systems equipped with two ASICs
  platform/x86: mlx-platform: Add cosmetic changes for alignment
  platform/x86: mlx-platform: Make activation of some drivers conditional
  ...
</content>
</entry>
<entry>
<title>Merge tag 'spdx-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx</title>
<updated>2022-08-04T19:12:54Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-08-04T19:12:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c1c76700a0d6e6090ccfe1209527f14c21b6681b'/>
<id>urn:sha1:c1c76700a0d6e6090ccfe1209527f14c21b6681b</id>
<content type='text'>
Pull SPDX updates from Greg KH:
 "Here is the set of SPDX comment updates for 6.0-rc1.

  Nothing huge here, just a number of updated SPDX license tags and
  cleanups based on the review of a number of common patterns in GPLv2
  boilerplate text.

  Also included in here are a few other minor updates, two USB files,
  and one Documentation file update to get the SPDX lines correct.

  All of these have been in the linux-next tree for a very long time"

* tag 'spdx-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx: (28 commits)
  Documentation: samsung-s3c24xx: Add blank line after SPDX directive
  x86/crypto: Remove stray comment terminator
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_406.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_398.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_391.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_390.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_385.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_320.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_319.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_318.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_298.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_292.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_179.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_168.RULE (part 2)
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_168.RULE (part 1)
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_160.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_152.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_149.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_147.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_133.RULE
  ...
</content>
</entry>
<entry>
<title>Merge tag 'driver-core-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core</title>
<updated>2022-08-04T18:31:20Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-08-04T18:31:20Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cfeafd94668910334a77c9437a18212baf9f5610'/>
<id>urn:sha1:cfeafd94668910334a77c9437a18212baf9f5610</id>
<content type='text'>
Pull driver core / kernfs updates from Greg KH:
 "Here is the set of driver core and kernfs changes for 6.0-rc1.

  The "biggest" thing in here is some scalability improvements for
  kernfs for large systems. Other than that, included in here are:

   - arch topology and cache info changes that have been reviewed and
     discussed a lot.

   - potential error path cleanup fixes

   - deferred driver probe cleanups

   - firmware loader cleanups and tweaks

   - documentation updates

   - other small things

  All of these have been in the linux-next tree for a while with no
  reported problems"

* tag 'driver-core-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (63 commits)
  docs: embargoed-hardware-issues: fix invalid AMD contact email
  firmware_loader: Replace kmap() with kmap_local_page()
  sysfs docs: ABI: Fix typo in comment
  kobject: fix Kconfig.debug "its" grammar
  kernfs: Fix typo 'the the' in comment
  docs: driver-api: firmware: add driver firmware guidelines. (v3)
  arch_topology: Fix cache attributes detection in the CPU hotplug path
  ACPI: PPTT: Leave the table mapped for the runtime usage
  cacheinfo: Use atomic allocation for percpu cache attributes
  drivers/base: fix userspace break from using bin_attributes for cpumap and cpulist
  MAINTAINERS: Change mentions of mpm to olivia
  docs: ABI: sysfs-devices-soc: Update Lee Jones' email address
  docs: ABI: sysfs-class-pwm: Update Lee Jones' email address
  Documentation/process: Add embargoed HW contact for LLVM
  Revert "kernfs: Change kernfs_notify_list to llist."
  ACPI: Remove the unused find_acpi_cpu_cache_topology()
  arch_topology: Warn that topology for nested clusters is not supported
  arch_topology: Add support for parsing sockets in /cpu-map
  arch_topology: Set cluster identifier in each core/thread from /cpu-map
  arch_topology: Limit span of cpu_clustergroup_mask()
  ...
</content>
</entry>
<entry>
<title>pinctrl: qcom: Make PINCTRL_SM8450 depend on PINCTRL_MSM</title>
<updated>2022-08-03T18:31:14Z</updated>
<author>
<name>John Garry</name>
<email>john.garry@huawei.com</email>
</author>
<published>2022-07-26T10:02:44Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9a206bca238177f7fa09fef6735aab7d5d3b2b19'/>
<id>urn:sha1:9a206bca238177f7fa09fef6735aab7d5d3b2b19</id>
<content type='text'>
All the many other configs depend on config PINCTRL_MSM, yet for config
PINCTRL_SM8450 we select config PINCTRL_MSM. Make config PINCTRL_SM8450
depend on PINCTRL_MSM to be consistent with the rest.

Signed-off-by: John Garry &lt;john.garry@huawei.com&gt;
Suggested-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Link: https://lore.kernel.org/r/1658829764-124936-1-git-send-email-john.garry@huawei.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: sm8250: Fix PDC map</title>
<updated>2022-08-03T18:20:56Z</updated>
<author>
<name>Jianhua Lu</name>
<email>lujianhua000@gmail.com</email>
</author>
<published>2022-08-03T01:56:45Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4b759ca15a4914f96ea204ea9200ceeb01d70666'/>
<id>urn:sha1:4b759ca15a4914f96ea204ea9200ceeb01d70666</id>
<content type='text'>
Fix the PDC mapping for SM8250, gpio39 is mapped to irq73(not irq37).

Fixes: b41efeed507a("pinctrl: qcom: sm8250: Specify PDC map.")
Signed-off-by: Jianhua Lu &lt;lujianhua000@gmail.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@somainline.org&gt;
Link: https://lore.kernel.org/r/20220803015645.22388-1-lujianhua000@gmail.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
</feed>
