<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/pinctrl, branch v6.17</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.17</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.17'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2025-09-08T21:01:19Z</updated>
<entry>
<title>pinctrl: airoha: fix wrong MDIO function bitmaks</title>
<updated>2025-09-08T21:01:19Z</updated>
<author>
<name>Christian Marangi</name>
<email>ansuelsmth@gmail.com</email>
</author>
<published>2025-09-08T11:37:19Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a061e739d36220c002da8b2429d5f16f637eb59a'/>
<id>urn:sha1:a061e739d36220c002da8b2429d5f16f637eb59a</id>
<content type='text'>
With further testing with an attached Aeonsemi it was discovered that
the pinctrl MDIO function applied the wrong bitmask. The error was
probably caused by the confusing documentation related to these bits.

Inspecting what the bootloader actually configure, the SGMII_MDIO_MODE
is never actually set but instead it's set force enable to the 2 GPIO
(gpio 1-2) for MDC and MDIO pin.

The usage of GPIO might be confusing but this is just to instruct the
SoC to not mess with those 2 PIN and as Benjamin reported it's also an
Errata of 7581. The FORCE_GPIO_EN doesn't set them as GPIO function
(that is configured by a different register) but it's really to actually
""enable"" those lines.

Normally the SoC should autodetect this by HW but it seems AN7581 have
problem with this and require this workaround to force enable the 2 pin.

Applying this configuration permits correct functionality of any
externally attached PHY.

Cc: stable@vger.kernel.org
Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC")
Signed-off-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
Acked-by: Benjamin Larsson &lt;benjamin.larsson@genexis.eu&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: airoha: fix wrong PHY LED mux value for LED1 GPIO46</title>
<updated>2025-09-08T13:01:39Z</updated>
<author>
<name>Christian Marangi</name>
<email>ansuelsmth@gmail.com</email>
</author>
<published>2025-09-08T11:34:24Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6f9674aa69ad0178ca8fc6995942ba9848c324f4'/>
<id>urn:sha1:6f9674aa69ad0178ca8fc6995942ba9848c324f4</id>
<content type='text'>
In all the MUX value for LED1 GPIO46 there is a Copy-Paste error where
the MUX value is set to LED0_MODE_MASK instead of LED1_MODE_MASK.

This wasn't notice as there were no board that made use of the
secondary PHY LED but looking at the internal Documentation the actual
value should be LED1_MODE_MASK similar to the other GPIO entry.

Fix the wrong value to apply the correct MUX configuration.

Cc: stable@vger.kernel.org
Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC")
Signed-off-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
Acked-by: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: airoha: Fix return value in pinconf callbacks</title>
<updated>2025-08-22T13:08:58Z</updated>
<author>
<name>Lorenzo Bianconi</name>
<email>lorenzo@kernel.org</email>
</author>
<published>2025-08-22T12:14:18Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=563fcd6475931c5c8c652a4dd548256314cc87ed'/>
<id>urn:sha1:563fcd6475931c5c8c652a4dd548256314cc87ed</id>
<content type='text'>
Pinctrl stack requires ENOTSUPP error code if the parameter is not
supported by the pinctrl driver. Fix the returned error code in pinconf
callbacks if the operation is not supported.

Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC")
Signed-off-by: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;
Link: https://lore.kernel.org/20250822-airoha-pinconf-err-val-fix-v1-1-87b4f264ced2@kernel.org
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: STMFX: add missing HAS_IOMEM dependency</title>
<updated>2025-08-22T06:34:30Z</updated>
<author>
<name>Randy Dunlap</name>
<email>rdunlap@infradead.org</email>
</author>
<published>2025-08-15T02:27:21Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a12946bef0407cf2db0899c83d42c47c00af3fbc'/>
<id>urn:sha1:a12946bef0407cf2db0899c83d42c47c00af3fbc</id>
<content type='text'>
When building on ARCH=um (which does not set HAS_IOMEM), kconfig
reports an unmet dependency caused by PINCTRL_STMFX. It selects
MFD_STMFX, which depends on HAS_IOMEM. To stop this warning,
PINCTRL_STMFX should also depend on HAS_IOMEM.

kconfig warning:
WARNING: unmet direct dependencies detected for MFD_STMFX
  Depends on [n]: HAS_IOMEM [=n] &amp;&amp; I2C [=y] &amp;&amp; OF [=y]
  Selected by [y]:
  - PINCTRL_STMFX [=y] &amp;&amp; PINCTRL [=y] &amp;&amp; I2C [=y] &amp;&amp; OF_GPIO [=y]

Fixes: 1490d9f841b1 ("pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver")
Signed-off-by: Randy Dunlap &lt;rdunlap@infradead.org&gt;
Link: https://lore.kernel.org/20250815022721.1650885-1-rdunlap@infradead.org
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: meson: Fix typo in device table macro</title>
<updated>2025-08-18T09:10:47Z</updated>
<author>
<name>Alexey Gladkov</name>
<email>legion@kernel.org</email>
</author>
<published>2025-08-14T13:07:13Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bd7c2312128e31d056d30d34d60503de056e15f0'/>
<id>urn:sha1:bd7c2312128e31d056d30d34d60503de056e15f0</id>
<content type='text'>
The typo when using the MODULE_DEVICE_TABLE macro was not noticeable
because the macro was defined only if the module was built as a separate
module.

Cc: Xianwei Zhao &lt;xianwei.zhao@amlogic.com&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Cc: Kevin Hilman &lt;khilman@baylibre.com&gt;
Cc: linux-amlogic@lists.infradead.org
Cc: linux-gpio@vger.kernel.org
Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Closes: https://lore.kernel.org/oe-kbuild-all/202507220009.8HKbNP16-lkp@intel.com/
Signed-off-by: Alexey Gladkov &lt;legion@kernel.org&gt;
Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Link: https://lore.kernel.org/e548b7761302defec15aa2098172eabb1ce1ad4a.1755170493.git.legion@kernel.org
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>treewide: rename GPIO set callbacks back to their original names</title>
<updated>2025-08-07T08:07:06Z</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>bartosz.golaszewski@linaro.org</email>
</author>
<published>2025-07-17T13:21:26Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d9d87d90cc0b10cd56ae353f50b11417e7d21712'/>
<id>urn:sha1:d9d87d90cc0b10cd56ae353f50b11417e7d21712</id>
<content type='text'>
The conversion of all GPIO drivers to using the .set_rv() and
.set_multiple_rv() callbacks from struct gpio_chip (which - unlike their
predecessors - return an integer and allow the controller drivers to
indicate failures to users) is now complete and the legacy ones have
been removed. Rename the new callbacks back to their original names in
one sweeping change.

Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'pinctrl-v6.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl</title>
<updated>2025-08-02T19:07:09Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-08-02T19:07:09Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=186f3edfdd41f2ae87fc40a9ccba52a3bf930994'/>
<id>urn:sha1:186f3edfdd41f2ae87fc40a9ccba52a3bf930994</id>
<content type='text'>
Pull pin control updates from Linus Walleij:
 "Nothing stands out, apart from maybe the interesting Eswin EIC7700, a
  RISC-V SoC I've never seen before.

  Core changes:

   - Open code PINCTRL_FUNCTION_DESC() instead of defining a complex
     macro only used in one place

   - Add pinmux_generic_add_pinfunction() helper and use this in a few
     drivers

  New drivers:

   - Amlogic S7, S7D and S6 pin control support

   - Eswin EIC7700 pin control support

   - Qualcomm PMIV0104, PM7550 and Milos pin control support

     Because of unhelpful numbering schemes, the Qualcomm driver now
     needs to start to rely on SoC codenames

   - STM32 HDP pin control support

   - Mediatek MT8189 pin control support

  Improvements:

   - Switch remaining pin control drivers over to the new GPIO set
     callback that provides a return value

   - Support RSVD (reserved) pins in the STM32 driver

   - Move many fixed assignments over to pinctrl_desc definitions

   - Handle multiple TLMM regions in the Qualcomm driver"

* tag 'pinctrl-v6.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (105 commits)
  pinctrl: mediatek: Add pinctrl driver for mt8189
  dt-bindings: pinctrl: mediatek: Add support for mt8189
  pinctrl: aspeed-g6: Add PCIe RC PERST pin group
  pinctrl: ingenic: use pinmux_generic_add_pinfunction()
  pinctrl: keembay: use pinmux_generic_add_pinfunction()
  pinctrl: mediatek: moore: use pinmux_generic_add_pinfunction()
  pinctrl: airoha: use pinmux_generic_add_pinfunction()
  pinctrl: equilibrium: use pinmux_generic_add_pinfunction()
  pinctrl: provide pinmux_generic_add_pinfunction()
  pinctrl: pinmux: open-code PINCTRL_FUNCTION_DESC()
  pinctrl: ma35: use new GPIO line value setter callbacks
  MAINTAINERS: add Clément Le Goffic as STM32 HDP maintainer
  pinctrl: stm32: Introduce HDP driver
  dt-bindings: pinctrl: stm32: Introduce HDP
  pinctrl: qcom: Add Milos pinctrl driver
  dt-bindings: pinctrl: document the Milos Top Level Mode Multiplexer
  pinctrl: qcom: spmi: Add PM7550
  dt-bindings: pinctrl: qcom,pmic-gpio: Add PM7550 support
  pinctrl: qcom: spmi: Add PMIV0104
  dt-bindings: pinctrl: qcom,pmic-gpio: Add PMIV0104 support
  ...
</content>
</entry>
<entry>
<title>Merge tag 'soc-drivers-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2025-07-29T18:13:27Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-07-29T18:13:27Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0f46f50845ce75bfaba62df0421084d23bb6a72f'/>
<id>urn:sha1:0f46f50845ce75bfaba62df0421084d23bb6a72f</id>
<content type='text'>
Pull SoC driver updates from Arnd Bergmann:
 "Changes are all over the place, but very little sticks out as
  noteworthy.

  There is a new misc driver for the Raspberry Pi 5's RP1 multifunction
  I/O chip, along with hooking it up to the pinctrl and clk frameworks.

  The reset controller and memory subsystems have mainly small updates,
  but there are two new reset drivers for the K230 and VC1800B SoCs, and
  new memory driver support for Tegra264.

  The ARM SMCCC and SCMI firmware drivers gain a few more features that
  should help them be supported across more environments. Similarly, the
  SoC specific firmware on Tegra and Qualcomm get minor enhancements and
  chip support.

  In the drivers/soc/ directory, the ASPEED LPC snoop driver gets an
  overhaul for code robustness, the Tegra and Qualcomm and NXP drivers
  grow to support more chips, while the Hisilicon, Mediatek and Renesas
  drivers see mostly janitorial fixes"

* tag 'soc-drivers-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (100 commits)
  bus: del unnecessary init var
  soc: fsl: qe: convert set_multiple() to returning an integer
  pinctrl: rp1: use new GPIO line value setter callbacks
  soc: hisilicon: kunpeng_hccs: Fix incorrect log information
  dt-bindings: soc: qcom: qcom,pmic-glink: document Milos compatible
  dt-bindings: soc: qcom,aoss-qmp: document the Milos Always-On Subsystem side channel
  dt-bindings: firmware: qcom,scm: document Milos SCM Firmware Interface
  soc: qcom: socinfo: Add support to retrieve APPSBL build details
  soc: qcom: pmic_glink: fix OF node leak
  soc: qcom: spmi-pmic: add more PMIC SUBTYPE IDs
  soc: qcom: socinfo: Add PM7550 &amp; PMIV0108 PMICs
  soc: qcom: socinfo: Add SoC IDs for SM7635 family
  dt-bindings: arm: qcom,ids: Add SoC IDs for SM7635 family
  firmware: qcom: scm: request the waitqueue irq *after* initializing SCM
  firmware: qcom: scm: initialize tzmem before marking SCM as available
  firmware: qcom: scm: take struct device as argument in SHM bridge enable
  firmware: qcom: scm: remove unused arguments from SHM bridge routines
  soc: qcom: rpmh-rsc: Add RSC version 4 support
  memory: tegra: Add Tegra264 MC and EMC support
  firmware: tegra: bpmp: Fix build failure for tegra264-only config
  ...
</content>
</entry>
<entry>
<title>pinctrl: mediatek: Add pinctrl driver for mt8189</title>
<updated>2025-07-23T11:35:40Z</updated>
<author>
<name>Cathy Xu</name>
<email>ot_cathy.xu@mediatek.com</email>
</author>
<published>2025-07-11T09:44:59Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a3fe1324c3c5c292ec79bd756497c1c44ff247d2'/>
<id>urn:sha1:a3fe1324c3c5c292ec79bd756497c1c44ff247d2</id>
<content type='text'>
Add pinctrl driver support for MediaTek Soc mt8189.

Signed-off-by: Cathy Xu &lt;ot_cathy.xu@mediatek.com&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Link: https://lore.kernel.org/20250711094513.17073-4-ot_cathy.xu@mediatek.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: aspeed-g6: Add PCIe RC PERST pin group</title>
<updated>2025-07-23T11:22:41Z</updated>
<author>
<name>Jacky Chou</name>
<email>jacky_chou@aspeedtech.com</email>
</author>
<published>2025-07-15T03:43:17Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b1d4c90bffdeda6c0a304249358608e4ddb80377'/>
<id>urn:sha1:b1d4c90bffdeda6c0a304249358608e4ddb80377</id>
<content type='text'>
The PCIe RC PERST uses SSPRST# as PERST#  and enable this pin
to output.

Signed-off-by: Jacky Chou &lt;jacky_chou@aspeedtech.com&gt;
Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Link: https://lore.kernel.org/20250715034320.2553837-8-jacky_chou@aspeedtech.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
</feed>
