<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/reset/Makefile, branch v4.8</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.8</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.8'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2016-06-29T21:39:10Z</updated>
<entry>
<title>reset: add TI SYSCON based reset driver</title>
<updated>2016-06-29T21:39:10Z</updated>
<author>
<name>Andrew F. Davis</name>
<email>afd@ti.com</email>
</author>
<published>2016-06-27T17:12:17Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cc7c2bb1493c4118d5ae69e350a405faf3ddfb89'/>
<id>urn:sha1:cc7c2bb1493c4118d5ae69e350a405faf3ddfb89</id>
<content type='text'>
Add a reset-controller driver for performing reset management of
various devices present on the SoC, with the reset registers shared
between devices in a common register memory space. This driver uses
the syscon/regmap frameworks to actually implement the various reset
functionalities needed by the reset consumer devices.

Signed-off-by: Andrew F. Davis &lt;afd@ti.com&gt;
[s-anna@ti.com: add documentation, syscon name change]
Signed-off-by: Suman Anna &lt;s-anna@ti.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: Add support for the Amlogic Meson SoC Reset Controller</title>
<updated>2016-06-01T06:21:10Z</updated>
<author>
<name>Neil Armstrong</name>
<email>narmstrong@baylibre.com</email>
</author>
<published>2016-05-30T13:27:15Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c7224dc343fda48f469e8337bea32b84f2fac41a'/>
<id>urn:sha1:c7224dc343fda48f469e8337bea32b84f2fac41a</id>
<content type='text'>
This patch adds the platform driver for the Amlogic Meson SoC Reset
Controller.

The Meson8b and GXBB SoCs are supported.

Signed-off-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: Add Oxford Semiconductor Reset Controller driver</title>
<updated>2016-04-01T14:31:09Z</updated>
<author>
<name>Neil Armstrong</name>
<email>narmstrong@baylibre.com</email>
</author>
<published>2016-04-01T14:16:13Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6e667fac8259d0dd2cf883fa3c51c0b8b8c89a90'/>
<id>urn:sha1:6e667fac8259d0dd2cf883fa3c51c0b8b8c89a90</id>
<content type='text'>
Add System reset controller driver for Oxford Semiconductor OXNAS SoC
Family.

CC: Ma Haijun &lt;mahaijuns@gmail.com&gt;
Signed-off-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: img: Add Pistachio reset controller driver</title>
<updated>2016-02-05T15:41:20Z</updated>
<author>
<name>Damien Horsley</name>
<email>Damien.Horsley@imgtec.com</email>
</author>
<published>2016-01-18T13:12:38Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=8a56736a2f53abe6edd1c67acc4f6161d5c16c07'/>
<id>urn:sha1:8a56736a2f53abe6edd1c67acc4f6161d5c16c07</id>
<content type='text'>
Add reset controller driver for Pistachio SoC

Signed-off-by: Damien Horsley &lt;Damien.Horsley@imgtec.com&gt;
Signed-off-by: James Hartley &lt;james.hartley@imgtec.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: hi6220: Reset driver for hisilicon hi6220 SoC</title>
<updated>2015-11-20T14:41:45Z</updated>
<author>
<name>Chen Feng</name>
<email>puck.chen@hisilicon.com</email>
</author>
<published>2015-11-20T02:10:05Z</published>
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<id>urn:sha1:f59d23c2c0eb23194ffc16f640dfac4da938b6ac</id>
<content type='text'>
Add reset driver for hi6220-hikey board,this driver supply deassert
of IP on hi6220 SoC.

Signed-off-by: Chen Feng &lt;puck.chen@hisilicon.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: remove redundant $(CONFIG_RESET_CONTROLLER) from Makefile</title>
<updated>2015-11-16T08:23:47Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2015-11-05T08:17:32Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5b321a631ab66c6ecf6aaa8a2059b61383e27096'/>
<id>urn:sha1:5b321a631ab66c6ecf6aaa8a2059b61383e27096</id>
<content type='text'>
The directory drivers/reset/ is guarded by CONFIG_RESET_CONTROLLER
in driver/Makefile.

CONFIG_RESET_CONTROLLER is boolean, so it always evaluates to 'y'
in drivers/reset/Makefile.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>Merge branch 'reset/ath79' into reset/next</title>
<updated>2015-08-16T15:11:20Z</updated>
<author>
<name>Philipp Zabel</name>
<email>p.zabel@pengutronix.de</email>
</author>
<published>2015-08-16T15:10:20Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5d44595c2627f7edcd8c24a76b13bd115f9fc2da'/>
<id>urn:sha1:5d44595c2627f7edcd8c24a76b13bd115f9fc2da</id>
<content type='text'>
</content>
</entry>
<entry>
<title>reset: reset-zynq: Adding support for Xilinx Zynq reset controller.</title>
<updated>2015-08-04T15:07:46Z</updated>
<author>
<name>Moritz Fischer</name>
<email>moritz.fischer@ettus.com</email>
</author>
<published>2015-07-31T01:13:56Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=fedf42b50d51758ce43fe0a652991dc01421f422'/>
<id>urn:sha1:fedf42b50d51758ce43fe0a652991dc01421f422</id>
<content type='text'>
This adds a reset controller driver to control the Xilinx Zynq
AP-SoC's various resets.

Signed-off-by: Moritz Fischer &lt;moritz.fischer@ettus.com&gt;
Reviewed-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Acked-by: Sören Brinkmann &lt;soren.brinkmann@xilinx.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: Add a driver for the reset controller on the AR71XX/AR9XXX</title>
<updated>2015-08-04T08:41:30Z</updated>
<author>
<name>Alban Bedel</name>
<email>albeu@free.fr</email>
</author>
<published>2015-08-03T17:23:52Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ff591a91225d3621a503bb18faa0f0d747a06e50'/>
<id>urn:sha1:ff591a91225d3621a503bb18faa0f0d747a06e50</id>
<content type='text'>
The AR71XX/AR9XXX SoC have a simple reset controller with one bit per
reset line.

Signed-off-by: Alban Bedel &lt;albeu@free.fr&gt;
Acked-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: add driver for lpc18xx rgu</title>
<updated>2015-08-03T11:13:51Z</updated>
<author>
<name>Joachim Eastwood</name>
<email>manabian@gmail.com</email>
</author>
<published>2015-05-05T22:10:26Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c392b65ba853f653cff3d1c7de2138bd6906d536'/>
<id>urn:sha1:c392b65ba853f653cff3d1c7de2138bd6906d536</id>
<content type='text'>
Add reset driver for the Reset Generation Unit (RGU) found on NXP
LPC18xx and LPC43xx devies. This reset controller features up to 64
reset lines connected to different blocks and peripheral in the SoC.
Most reset lines on the controller are self clearing except for
those dealing with the Cortex-M0 cores on LPC43xx devices.

This driver also registers a restart handler that can be used to
reset the entire device.

Signed-off-by: Joachim Eastwood &lt;manabian@gmail.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
</feed>
