linux/drivers/spmi, branch v4.3

genirq: Remove irq argument from irq flow handlers

2015-09-16T13:47:51Z

Most interrupt flow handlers do not use the irq argument. Those few which use it can retrieve the irq number from the irq descriptor. Remove the argument. Search and replace was done with coccinelle and some extra helper scripts around it. Thanks to Julia for her help! Signed-off-by: Thomas Gleixner Cc: Julia Lawall Cc: Jiang Liu

Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

2015-09-01T21:33:35Z

Pull irq updates from Thomas Gleixner: "This updated pull request does not contain the last few GIC related patches which were reported to cause a regression. There is a fix available, but I let it breed for a couple of days first. The irq departement provides: - new infrastructure to support non PCI based MSI interrupts - a couple of new irq chip drivers - the usual pile of fixlets and updates to irq chip drivers - preparatory changes for removal of the irq argument from interrupt flow handlers - preparatory changes to remove IRQF_VALID" * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (129 commits) irqchip/imx-gpcv2: IMX GPCv2 driver for wakeup sources irqchip: Add bcm2836 interrupt controller for Raspberry Pi 2 irqchip: Add documentation for the bcm2836 interrupt controller irqchip/bcm2835: Add support for being used as a second level controller irqchip/bcm2835: Refactor handle_IRQ() calls out of MAKE_HWIRQ PCI: xilinx: Fix typo in function name irqchip/gic: Ensure gic_cpu_if_up/down() programs correct GIC instance irqchip/gic: Only allow the primary GIC to set the CPU map PCI/MSI: pci-xgene-msi: Consolidate chained IRQ handler install/remove unicore32/irq: Prepare puv3_gpio_handler for irq argument removal tile/pci_gx: Prepare trio_handle_level_irq for irq argument removal m68k/irq: Prepare irq handlers for irq argument removal C6X/megamode-pic: Prepare megamod_irq_cascade for irq argument removal blackfin: Prepare irq handlers for irq argument removal arc/irq: Prepare idu_cascade_isr for irq argument removal sparc/irq: Use access helper irq_data_get_affinity_mask() sparc/irq: Use helper irq_data_get_irq_handler_data() parisc/irq: Use access helper irq_data_get_affinity_mask() mn10300/irq: Use access helper irq_data_get_affinity_mask() irqchip/i8259: Prepare i8259_irq_dispatch for irq argument removal ...

spmi: Select IRQ_DOMAIN instead of depend on it

2015-08-05T19:27:09Z

IRQ_DOMAIN is a hidden config option, so depending on it doesn't make any sense. Select the config option because it's required to compile this driver. Signed-off-by: Stephen Boyd Reviewed-by: Andy Gross Signed-off-by: Greg Kroah-Hartman

spmi: pmic-arb: add support for irq_get_irqchip_state

2015-08-05T19:27:09Z

Reviewed-by: Andy Gross Signed-off-by: Courtney Cavin Signed-off-by: Bjorn Andersson Tested-by: Tim Bird Signed-off-by: Greg Kroah-Hartman

spmi: add command tracepoints for SPMI

2015-08-05T19:27:09Z

Add tracepoints to retrieve information about read, write and non-data commands. For performance measurement support tracepoints are added at the beginning and at the end of transfers. Following is a list showing the new tracepoint events. The "cmd" parameter here represents the opcode, SID, and full 16-bit address. spmi_write_begin: cmd and data buffer. spmi_write_end : cmd and return value. spmi_read_begin : cmd. spmi_read_end : cmd, return value and data buffer. spmi_cmd : cmd. The reason that cmd appears at both the beginning and at the end event is that SPMI drivers can request commands concurrently. cmd helps in matching the corresponding events. SPMI tracepoints can be enabled like: echo 1 >/sys/kernel/debug/tracing/events/spmi/enable and will dump messages that can be viewed in /sys/kernel/debug/tracing/trace that look like: ... spmi_read_begin: opc=56 sid=00 addr=0x0000 ... spmi_read_end: opc=56 sid=00 addr=0x0000 ret=0 len=02 buf=0x[01-40] ... spmi_write_begin: opc=48 sid=00 addr=0x0000 len=3 buf=0x[ff-ff-ff] Suggested-by: Sagar Dharia Acked-by: Steven Rostedt Reviewed-by: Stephen Boyd Signed-off-by: Gilad Avidov Signed-off-by: Ankit Gupta Signed-off-by: Greg Kroah-Hartman

spmi/pmic: Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc

2015-07-29T08:08:10Z

Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc while we already have a pointer to corresponding irq_desc. Signed-off-by: Jiang Liu Cc: Greg Kroah-Hartman Link: http://lkml.kernel.org/r/20150713151750.915477120@linutronix.de Signed-off-by: Thomas Gleixner Signed-off-by: Ingo Molnar

spmi/pmic_arb: Consolidate chained IRQ handler install/remove

2015-07-29T08:08:10Z

Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc->lock. Replace the two calls with one. Search and conversion was done with coccinelle. Reported-by: Russell King Signed-off-by: Thomas Gleixner Cc: Greg Kroah-Hartman Cc: Jiang Liu Cc: Julia Lawall Link: http://lkml.kernel.org/r/20150713151750.831790045@linutronix.de Signed-off-by: Thomas Gleixner Signed-off-by: Ingo Molnar

spmi: Add dependency on HAS_IOMEM

2015-05-24T18:55:15Z

Not all architectures have io memory. Fixes: drivers/built-in.o: In function `spmi_pmic_arb_probe': spmi-pmic-arb.c:(.text+0x1ed399): undefined reference to `devm_ioremap_resource' Signed-off-by: Richard Weinberger Signed-off-by: Greg Kroah-Hartman

spmi: pmic_arb: remove ARM build time dependency

2015-04-03T14:15:30Z

Qualcomm PMIC arbiter driver already depends on ARCH_QCOM, which could be either ARM or ARM64. New version of the PMIC arbiter controller is available on 64 bit platforms. Remove ARM dependency to allow driver to be build for 64 bit platforms. Signed-off-by: Ivan T. Ivanov Signed-off-by: Greg Kroah-Hartman

spmi: pmic_arb: add support for hw version 2

2015-03-26T22:51:36Z

Qualcomm PMIC Arbiter version-2 changes from version-1 are: - Some different register offsets. - New channel register space, one per PMIC peripheral (ppid). All tx traffic uses these channels. - New observer register space. All rx trafic uses this space. - Different command format for spmi command registers. Reviewed-by: Sagar Dharia Signed-off-by: Gilad Avidov Tested-by: Ivan T. Ivanov Signed-off-by: Greg Kroah-Hartman