<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/tty/serial/sh-sci.c, branch v4.8</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.8</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.8'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2016-06-26T17:57:13Z</updated>
<entry>
<title>serial: sh-sci: Stop transfers in sci_shutdown()</title>
<updated>2016-06-26T17:57:13Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2016-06-26T09:20:21Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5fd2b6ee7a319e0955acff96948fae57321b1f5a'/>
<id>urn:sha1:5fd2b6ee7a319e0955acff96948fae57321b1f5a</id>
<content type='text'>
Make sure the transmitter and receiver are stopped when shutting down
the port, and related interrupts are disabled.

Without this:
  - New input data may be received into the RX FIFO, possibly
    triggering a new RX DMA completion,
  - Transfers will still be enabled on a subsequent startup of the UART,
    before the UART's FIFOs have been reset, causing reading of stale
    data.

Inspired by a patch in the BSP by Koji Matsuoka
&lt;koji.matsuoka.xm@renesas.com&gt;.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: sh-sci: Clear (H)SCIF timeout and overrun during reset</title>
<updated>2016-06-25T16:09:53Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2016-06-24T14:59:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=fc2af3348a4acea0c28db89a8c84660d0baed4aa'/>
<id>urn:sha1:fc2af3348a4acea0c28db89a8c84660d0baed4aa</id>
<content type='text'>
Add the missing timeout bit definition for (H)SCIF.
Clear the timeout and overrun flag bits during UART reset, cfr. the
initialization flowchart in the datasheet.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: sh-sci: Clear RX, error, and break flags during reset</title>
<updated>2016-06-25T16:09:53Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2016-06-24T14:59:15Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2768cf42874ae04bdbc33a9c9db96181dc0bbb8d'/>
<id>urn:sha1:2768cf42874ae04bdbc33a9c9db96181dc0bbb8d</id>
<content type='text'>
Setting the FIFO reset bits is not sufficient to reset the RX FIFO.
After this the status register's RDF flag bit may still be set, causing
the reception of one stale byte of data.

To fix this, clear all status flag bits related to reception, error, and
break handling, cfr. the initialization flowchart in the datasheet.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: sh-sci: Do not start transfers from sci_startup()</title>
<updated>2016-06-25T16:09:53Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2016-06-24T14:59:13Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=44763d3d301a13523186731b4797b181c78fe8b4'/>
<id>urn:sha1:44763d3d301a13523186731b4797b181c78fe8b4</id>
<content type='text'>
FIFO reset is done in sci_reset(), called from sci_set_termios(), while
sci_start_tx() and sci_start_rx() are called before, from sci_startup().
However, starting transfers before the UART's FIFOs have been reset may
cause reading of stale data.

Remove the calls to sci_start_tx() and sci_start_rx() from sci_startup()
to fix this.

Transfers are still started when needed:
  - sci_start_rx() is called from sci_set_termios() after FIFO reset, if
    the CREAD flag is set,
  - sci_start_tx() is called from uart_change_speed() immediately
    thereafter, if transmission is enabled.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: sh-sci: Add DT support for dedicated RTS/CTS</title>
<updated>2016-06-25T16:07:51Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2016-06-03T10:00:11Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=861a70abb483645d4474a6bc006471c2db59a78d'/>
<id>urn:sha1:861a70abb483645d4474a6bc006471c2db59a78d</id>
<content type='text'>
Add support for indicating the availability of dedicated lines for
RTS/CTS hardware flow control, using the standard "uart-has-rtscts" DT
property.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: sh-sci: Fix support for hardware-assisted RTS/CTS</title>
<updated>2016-06-25T16:07:51Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2016-06-03T10:00:10Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=33f50ffc253854cf6cd556786ae893c7454a1a67'/>
<id>urn:sha1:33f50ffc253854cf6cd556786ae893c7454a1a67</id>
<content type='text'>
The existing support for hardware-assisted RTS/CTS is rudimentary and
doesn't work.

Add support for hardware-assisted RTS/CTS hardware flow control for the
(H)SCIF, SCIFA, and SCIFB variants.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: sh-sci: Add pin initialization for SCIFA/SCIFB</title>
<updated>2016-06-25T16:07:51Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2016-06-03T10:00:09Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e9d7a45a039913497a57887d85f5decfda4679f0'/>
<id>urn:sha1:e9d7a45a039913497a57887d85f5decfda4679f0</id>
<content type='text'>
Before, the driver relied on initialization by the boot loader, or by
implicit reset state.

Note that unlike on (H)SCIF, the RTS/CTS bits exist only if dedicated
RTS/CTS pins are available, which depends on the SoC and UART instance.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: sh-sci: Correct pin initialization on (H)SCIF</title>
<updated>2016-06-25T16:07:51Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2016-06-03T10:00:08Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d2b9775d795ec05fb42504c0f47dd06ba5fd709e'/>
<id>urn:sha1:d2b9775d795ec05fb42504c0f47dd06ba5fd709e</id>
<content type='text'>
Correct pin initialization on (H)SCIF:
  - RTS must be deasserted (it's active low),
  - SCK must be an input, as it may be used as the optional external
    clock input.

Initial pin configuration must always be done:
  - Regardless of the presence of dedicated RTS and CTS pins: if the
    register exists, the RTS/CTS bits exist, too,
  - Regardless of hardware flow control being enabled or not: RTS must
    be deasserted.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: sh-sci: Do not open-code sci_getreg()</title>
<updated>2016-06-25T16:07:51Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2016-06-03T10:00:05Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=abbf121fb6dae6657388a32feac346e5e1debdbd'/>
<id>urn:sha1:abbf121fb6dae6657388a32feac346e5e1debdbd</id>
<content type='text'>
Replace open-coded variants of sci_getreg() by function calls, and drop
intermediate variables where appropriate.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Peter Hurley &lt;peter@hurleysoftware.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: sh-sci: Add support for GPIO-controlled modem lines</title>
<updated>2016-06-25T16:07:51Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2016-06-03T10:00:04Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f907c9ea88355ac9fe065ffbd6acc914408b4232'/>
<id>urn:sha1:f907c9ea88355ac9fe065ffbd6acc914408b4232</id>
<content type='text'>
Enhance the Renesas SCI UART driver to add support for GPIO-controlled
modem lines (CTS, DSR, DCD, RNG, RTS, DTR), using the serial_mctrl_gpio
helpers.

GPIO-controlled modem lines can be used when dedicated modem lines are
not available. Invalid configurations specifying both GPIO RTS/CTS and
dedicated RTS/CTS are rejected.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Peter Hurley &lt;peter@hurleysoftware.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
</feed>
