<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/watchdog/Kconfig, branch master</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=master</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2026-01-18T09:55:08Z</updated>
<entry>
<title>watchdog: iTCO: Drop vendor support</title>
<updated>2026-01-18T09:55:08Z</updated>
<author>
<name>Guenter Roeck</name>
<email>linux@roeck-us.net</email>
</author>
<published>2025-11-18T19:29:58Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0bf75b9c8a0eb1ef46ce85a393dd27ae801fc207'/>
<id>urn:sha1:0bf75b9c8a0eb1ef46ce85a393dd27ae801fc207</id>
<content type='text'>
iTCO vendor support was introduced in 2006 to support SuperMicro boards
with Pentium 3 CPUs. It was extended in 2009 to support motherbords
with broken BIOS (specifically Intel DG33TL). The code is long since
obsolete, so let's drop support for it.

Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Reviewed-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
Signed-off-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
</content>
</entry>
<entry>
<title>watchdog: loongson1: Add Loongson-2k0300 watchdog support</title>
<updated>2025-11-15T14:28:10Z</updated>
<author>
<name>Binbin Zhou</name>
<email>zhoubinbin@loongson.cn</email>
</author>
<published>2025-11-07T06:01:51Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e0c50cddbd942338cbd6029ddbbcef4268a30718'/>
<id>urn:sha1:e0c50cddbd942338cbd6029ddbbcef4268a30718</id>
<content type='text'>
According to the manual, the Loongson-2K0300 watchdog is similar to the
Loongson-1, except for some register offsets and inconsistent register
bit definitions. Separate definitions via driver_data suffice.

Co-developed-by: Xiaochuang Mao &lt;maoxiaochuan@loongson.cn&gt;
Signed-off-by: Xiaochuang Mao &lt;maoxiaochuan@loongson.cn&gt;
Signed-off-by: Binbin Zhou &lt;zhoubinbin@loongson.cn&gt;
Reviewed-by: Huacai Chen &lt;chenhuacai@loongson.cn&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
</content>
</entry>
<entry>
<title>watchdog: renesas_wwdt: add driver</title>
<updated>2025-11-15T14:19:55Z</updated>
<author>
<name>Wolfram Sang</name>
<email>wsa+renesas@sang-engineering.com</email>
</author>
<published>2025-10-17T10:15:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=babe81b06158da7e845d19fae0a9205baf2b211d'/>
<id>urn:sha1:babe81b06158da7e845d19fae0a9205baf2b211d</id>
<content type='text'>
This driver adds support for the Renesas Window Watchdog Timer (WWDT).
Because it can only be setup once after boot and we cannot know if this
already happened in early boot stages, it is mandated that the firmware
configures the watchdog. Linux then adapts according to the given
setup. Note that this watchdog only reports an overflow to the Error
Control Module (ECM) and does not reset the SoC on its own.

Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
</content>
</entry>
<entry>
<title>watchdog: Add Nuvoton NCT6694 WDT support</title>
<updated>2025-09-16T13:41:57Z</updated>
<author>
<name>Ming Yu</name>
<email>a0282524688@gmail.com</email>
</author>
<published>2025-09-12T09:19:50Z</published>
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<id>urn:sha1:f9d737a7d84ff4c1df4244361e66ddda400678dc</id>
<content type='text'>
This driver supports Watchdog timer functionality for NCT6694 MFD
device based on USB interface.

Acked-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Ming Yu &lt;a0282524688@gmail.com&gt;
Link: https://lore.kernel.org/r/20250912091952.1169369-6-a0282524688@gmail.com
Signed-off-by: Lee Jones &lt;lee@kernel.org&gt;
</content>
</entry>
<entry>
<title>watchdog: Add driver for Intel OC WDT</title>
<updated>2025-06-01T11:16:33Z</updated>
<author>
<name>Diogo Ivo</name>
<email>diogo.ivo@siemens.com</email>
</author>
<published>2025-03-17T10:55:06Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=535d1784d8a96dce79023ac5081de1aa8669388a'/>
<id>urn:sha1:535d1784d8a96dce79023ac5081de1aa8669388a</id>
<content type='text'>
Add a driver for the Intel Over-Clocking Watchdog found in Intel
Platform Controller (PCH) chipsets. This watchdog is controlled
via a simple single-register interface and would otherwise be
standard except for the presence of a LOCK bit that can only be
set once per power cycle, needing extra handling around it.

Signed-off-by: Diogo Ivo &lt;diogo.ivo@siemens.com&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Link: https://lore.kernel.org/r/20250317-ivo-intel_oc_wdt-v3-1-32c396f4eefd@siemens.com
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
</content>
</entry>
<entry>
<title>watchdog: Add the Watchdog Timer for the NXP S32 platform</title>
<updated>2025-05-24T14:57:54Z</updated>
<author>
<name>Daniel Lezcano</name>
<email>daniel.lezcano@linaro.org</email>
</author>
<published>2025-04-10T08:26:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bd3f54ec559b554671e5a683e05794abe3a609df'/>
<id>urn:sha1:bd3f54ec559b554671e5a683e05794abe3a609df</id>
<content type='text'>
The S32 platform has several Watchdog Timer available and tied with a
CPU. The SWT0 is the only one which directly asserts the reset line,
other SWT require an external setup to configure the reset behavior
which is not part of this change.

As a side note, in the NXP documentation, the s32g2 and s32g3
reference manuals refer the watchdog as the 'Software Timer Watchdog'
where the name can be misleading as it is actually a hardware
watchdog.

The maximum watchdog timeout value depends on the clock feeding the
SWT counter which is 32bits wide. On the s32g274-rb2, the clock has a
rate of 51MHz which result on 83 seconds maximum timeout.

The timeout can be specified via the device tree with the usual
existing bindings 'timeout-sec' or via the module param timeout.

The watchdog can be loaded with the 'nowayout' option, preventing the
watchdog to be stopped.

The watchdog can be started at boot time with the 'early-enable'
option, thus letting the watchdog framework to service the watchdog
counter.

The watchdog support the magic character to stop when the userspace
releases the device.

Cc: Ghennadi Procopciuc &lt;ghennadi.procopciuc@nxp.com&gt;
Cc: Thomas Fossati &lt;thomas.fossati@linaro.org&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Tested-by: Alexandru-Catalin Ionita &lt;alexandru-catalin.ionita@nxp.com&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Link: https://lore.kernel.org/r/20250410082616.1855860-3-daniel.lezcano@linaro.org
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
</content>
</entry>
<entry>
<title>watchdog: Do not enable by default during compile testing</title>
<updated>2025-05-24T14:57:53Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2025-04-04T12:39:41Z</published>
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<id>urn:sha1:13b5fb3331436b6ec497763d733d3d749b161b01</id>
<content type='text'>
Enabling the compile test should not cause automatic enabling of all
drivers.

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Link: https://lore.kernel.org/r/20250404123941.362620-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
</content>
</entry>
<entry>
<title>watchdog: nic7018_wdt: tidy up ACPI ID table</title>
<updated>2025-03-09T14:19:44Z</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2025-03-04T13:45:35Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f1c16aa612dcc5b03f5d6f39ca53f791d36850e1'/>
<id>urn:sha1:f1c16aa612dcc5b03f5d6f39ca53f791d36850e1</id>
<content type='text'>
Tidy up ACPI ID table:
- drop ACPI_PTR() and hence replace acpi.h with mod_devicetable.h
- remove explicit driver_data initializer
- drop comma in the terminator entry

With that done, extend compile test coverage.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Link: https://lore.kernel.org/r/20250304140114.1812452-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
</content>
</entry>
<entry>
<title>watchdog: lenovo_se30_wdt: Watchdog driver for Lenovo SE30 platform</title>
<updated>2025-03-09T14:19:43Z</updated>
<author>
<name>Mark Pearson</name>
<email>mpearson-lenovo@squebb.ca</email>
</author>
<published>2025-01-31T20:48:55Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c284153a2c5537db4fec51ac850c17d2eb1ffcfe'/>
<id>urn:sha1:c284153a2c5537db4fec51ac850c17d2eb1ffcfe</id>
<content type='text'>
Watchdog driver implementation for Lenovo SE30 platform.

Signed-off-by: Mark Pearson &lt;mpearson-lenovo@squebb.ca&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Link: https://lore.kernel.org/r/20250131204855.1827-1-mpearson-lenovo@squebb.ca
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
</content>
</entry>
<entry>
<title>watchdog: Enable RZV2HWDT driver depend on ARCH_RENESAS</title>
<updated>2025-03-09T14:19:42Z</updated>
<author>
<name>Biju Das</name>
<email>biju.das.jz@bp.renesas.com</email>
</author>
<published>2025-01-26T13:26:31Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=331c8349605c8fa2f9040c39fe8c40afe3fdc3c3'/>
<id>urn:sha1:331c8349605c8fa2f9040c39fe8c40afe3fdc3c3</id>
<content type='text'>
RZ/G3E watchdog timer IP is similar to the one found on RZ/V2H. Both these
SoCs belong to the ARCH_RENESAS family. So, it makes sense to use
ARCH_RENESAS rather than ARCH_R9A09G057 to enable the RZV2HWDT driver.

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Link: https://lore.kernel.org/r/20250126132633.31956-3-biju.das.jz@bp.renesas.com
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
</content>
</entry>
</feed>
