linux/include/asm-mips/cpu.h, branch v2.6.23

[MIPS] PMC MSP71xx mips common

2007-07-10T16:33:03Z

Patch to add mips common support for the PMC-Sierra MSP71xx devices. Signed-off-by: Marc St-Jean Signed-off-by: Ralf Baechle

[MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2

2007-07-10T16:33:02Z

Signed-off-by: Fuxin Zhang Signed-off-by: Ralf Baechle

[MIPS] Enable support for the userlocal hardware register

2007-07-10T16:33:02Z

Which will cut down the cost of RDHWR $29 which is used to obtain the TLS pointer and so far being emulated in software down to a single cycle operation. Signed-off-by: Ralf Baechle

[MIPS] Add macros to encode processor revisions.

2007-07-06T15:17:11Z

Older processors used to encode processor version and revision in two 4-bit bitfields, the 4K seems to simply count up and even newer MTI cores have switched to use the 8-bits as 3:3:2 bitfield with the last field as the patch number. Signed-off-by: Ralf Baechle

[MIPS] Use the proper technical term for naming some of the cache macros.

2006-07-13T20:26:04Z

Signed-off-by: Ralf Baechle

[MIPS] Treat R14000 like R10000.

2006-05-31T23:28:35Z

Signed-off-by: Joshua Kinard Signed-off-by: Ralf Baechle

[MIPS] Fix detection and handling of the 74K processor.

2006-05-31T23:28:30Z

Nothing exciting; Linux just didn't know it yet so this is most adding a value to a case statement. Signed-off-by: Chris Dearman Signed-off-by: Ralf Baechle

[MIPS] Fix CPU type bitmasks for MIPS III, IV and V.

2006-02-14T19:13:25Z

Signed-off-by: Maciej W. Rozycki Signed-off-by: Ralf Baechle

MIPS: Reorganize ISA constants strictly as bitmasks.

2006-01-10T13:39:07Z

Signed-off-by: Ralf Baechle

MIPS: Introduce machinery for testing for MIPSxxR1/2.

2006-01-10T13:39:06Z

Signed-off-by: Ralf Baechle