<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/include/drm/intel, branch for-next</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=for-next</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=for-next'/>
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<updated>2024-11-21T22:56:17Z</updated>
<entry>
<title>Merge tag 'drm-next-2024-11-21' of https://gitlab.freedesktop.org/drm/kernel</title>
<updated>2024-11-21T22:56:17Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2024-11-21T22:56:17Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=28eb75e178d389d325f1666e422bc13bbbb9804c'/>
<id>urn:sha1:28eb75e178d389d325f1666e422bc13bbbb9804c</id>
<content type='text'>
Pull drm updates from Dave Airlie:
 "There's a lot of rework, the panic helper support is being added to
  more drivers, v3d gets support for HW superpages, scheduler
  documentation, drm client and video aperture reworks, some new
  MAINTAINERS added, amdgpu has the usual lots of IP refactors, Intel
  has some Pantherlake enablement and xe is getting some SRIOV bits, but
  just lots of stuff everywhere.

  core:
   - split DSC helpers from DP helpers
   - clang build fixes for drm/mm test
   - drop simple pipeline support for gem vram
   - document submission error signaling
   - move drm_rect to drm core module from kms helper
   - add default client setup to most drivers
   - move to video aperture helpers instead of drm ones

  tests:
   - new framebuffer tests

  ttm:
   - remove swapped and pinned BOs from TTM lru

  panic:
   - fix uninit spinlock
   - add ABGR2101010 support

  bridge:
   - add TI TDP158 support
   - use standard PM OPS

  dma-fence:
   - use read_trylock instead of read_lock to help lockdep

  scheduler:
   - add errno to sched start to report different errors
   - add locking to drm_sched_entity_modify_sched
   - improve documentation

  xe:
   - add drm_line_printer
   - lots of refactoring
   - Enable Xe2 + PES disaggregation
   - add new ARL PCI ID
   - SRIOV development work
   - fix exec unnecessary implicit fence
   - define and parse OA sync props
   - forcewake refactoring

  i915:
   - Enable BMG/LNL ultra joiner
   - Enable 10bpx + CCS scanout on ICL+, fp16/CCS on TGL+
   - use DSB for plane/color mgmt
   - Arrow lake PCI IDs
   - lots of i915/xe display refactoring
   - enable PXP GuC autoteardown
   - Pantherlake (PTL) Xe3 LPD display enablement
   - Allow fastset HDR infoframe changes
   - write DP source OUI for non-eDP sinks
   - share PCI IDs between i915 and xe

  amdgpu:
   - SDMA queue reset support
   - SMU 13.0.6, JPEG 4.0.3 updates
   - Initial runtime repartitioning support
   - rework IP structs for multiple IP instances
   - Fetch EDID from _DDC if available
   - SMU13 zero rpm user control
   - lots of fixes/cleanups

  amdkfd:
   - Increase event FIFO size
   - add topology cap flag for per queue reset

  msm:
   - DPU:
      - SA8775P support
      - (disabled by default) MSM8917, MSM8937, MSM8953 and MSM8996 support
      - Enable large framebuffer support
      - Drop MSM8998 and SDM845
   - DP:
      - SA8775P support
   - GPU:
      - a7xx preemption support
      - Adreno A663 support

  ast:
   - warn about unsupported TX chips

  ivpu:
   - add coredump
   - add pantherlake support

  rockchip:
   - 4K@60Hz display enablement
   - generate pll programming tables

  panthor:
   - add timestamp query API
   - add realtime group priority
   - add fdinfo support

  etnaviv:
   - improve handling of DMA address limits
   - improve GPU hangcheck

  exynos:
   - Decon Exynos7870 support

  mediatek:
   - add OF graph support

  omap:
   - locking fixes

  bochs:
   - convert to gem/shmem from simpledrm

  v3d:
   - support big/super pages
   - add gemfs

  vc4:
   - BCM2712 support refactoring
   - add YUV444 format support

  udmabuf:
   - folio related fixes

  nouveau:
   - add panic support on nv50+"

* tag 'drm-next-2024-11-21' of https://gitlab.freedesktop.org/drm/kernel: (1583 commits)
  drm/xe/guc: Fix dereference before NULL check
  drm/amd: Fix initialization mistake for NBIO 7.7.0
  Revert "drm/amd/display: parse umc_info or vram_info based on ASIC"
  drm/amd/display: Fix failure to read vram info due to static BP_RESULT
  drm/amdgpu: enable GTT fallback handling for dGPUs only
  drm/amd/amdgpu: limit single process inside MES
  drm/fourcc: add AMD_FMT_MOD_TILE_GFX9_4K_D_X
  drm/amdgpu/mes12: correct kiq unmap latency
  drm/amdgpu: Support vcn and jpeg error info parsing
  drm/amd : Update MES API header file for v11 &amp; v12
  drm/amd/amdkfd: add/remove kfd queues on start/stop KFD scheduling
  drm/amdkfd: change kfd process kref count at creation
  drm/amdgpu: Cleanup shift coding style
  drm/amd/amdgpu: Increase MES log buffer to dump mes scratch data
  drm/amdgpu: Implement virt req_ras_err_count
  drm/amdgpu: VF Query RAS Caps from Host if supported
  drm/amdgpu: Add msg handlers for SRIOV RAS Telemetry
  drm/amdgpu: Update SRIOV Exchange Headers for RAS Telemetry Support
  drm/amd/display: 3.2.309
  drm/amd/display: Adjust VSDB parser for replay feature
  ...
</content>
</entry>
<entry>
<title>drm/i915/gsc: ARL-H and ARL-U need a newer GSC FW.</title>
<updated>2024-11-12T07:44:55Z</updated>
<author>
<name>Daniele Ceraolo Spurio</name>
<email>daniele.ceraolospurio@intel.com</email>
</author>
<published>2024-10-28T23:31:32Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=db0fc586edde83ff7ff65fea56c4f72dae511764'/>
<id>urn:sha1:db0fc586edde83ff7ff65fea56c4f72dae511764</id>
<content type='text'>
All MTL and ARL SKUs share the same GSC FW, but the newer platforms are
only supported in newer blobs. In particular, ARL-S is supported
starting from 102.0.10.1878 (which is already the minimum required
version for ARL in the code), while ARL-H and ARL-U are supported from
102.1.15.1926. Therefore, the driver needs to check which specific ARL
subplatform its running on when verifying that the GSC FW is new enough
for it.

Fixes: 2955ae8186c8 ("drm/i915: ARL requires a newer GSC firmware")
Signed-off-by: Daniele Ceraolo Spurio &lt;daniele.ceraolospurio@intel.com&gt;
Cc: John Harrison &lt;John.C.Harrison@Intel.com&gt;
Cc: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Reviewed-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Reviewed-by: John Harrison &lt;John.C.Harrison@Intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20241028233132.149745-1-daniele.ceraolospurio@intel.com
(cherry picked from commit 3c1d5ced18db8a67251c8436cf9bdc061f972bdb)
Signed-off-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>drm/xe: switch to common PCI ID macros</title>
<updated>2024-10-29T14:29:58Z</updated>
<author>
<name>Jani Nikula</name>
<email>jani.nikula@intel.com</email>
</author>
<published>2024-10-22T09:41:51Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=493454445c9531051bd27a0305a61953780bd453'/>
<id>urn:sha1:493454445c9531051bd27a0305a61953780bd453</id>
<content type='text'>
Switch to the shared PCI ID macros in drm/intel/pciids.h. Remove
xe_pciids.h.

Cc: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Cc: Lucas De Marchi &lt;lucas.demarchi@intel.com&gt;
Cc: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Cc: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Cc: Tvrtko Ursulin &lt;tursulin@ursulin.net&gt;
Reviewed-by: Andi Shyti &lt;andi.shyti@linux.intel.com&gt;
Acked-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/84e08172184bdc6409cf6dd13f6c52971c647dbb.1729590029.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/intel/pciids: rename i915_pciids.h to just pciids.h</title>
<updated>2024-10-29T14:14:04Z</updated>
<author>
<name>Jani Nikula</name>
<email>jani.nikula@intel.com</email>
</author>
<published>2024-10-22T09:41:50Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f719c2a2d1e7fb891d45998f241ff4273d7ae7e6'/>
<id>urn:sha1:f719c2a2d1e7fb891d45998f241ff4273d7ae7e6</id>
<content type='text'>
In preparation of sharing the PCI ID macros between i915 and xe, rename
i915_pciids.h to pciids.h.

Cc: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Cc: Lucas De Marchi &lt;lucas.demarchi@intel.com&gt;
Cc: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Cc: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Cc: Tvrtko Ursulin &lt;tursulin@ursulin.net&gt;
Reviewed-by: Andi Shyti &lt;andi.shyti@linux.intel.com&gt;
Acked-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/835143845faa5310e4bb58405a8a0848392bbf06.1729590029.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/pciids: add PVC PCI ID macros</title>
<updated>2024-10-29T14:13:16Z</updated>
<author>
<name>Jani Nikula</name>
<email>jani.nikula@intel.com</email>
</author>
<published>2024-10-22T09:41:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1db363f6979d1fc8a94ea561a50f79bac40d39e4'/>
<id>urn:sha1:1db363f6979d1fc8a94ea561a50f79bac40d39e4</id>
<content type='text'>
The xe PCI ID macros are a subset of the i915 PCI IDs macros, apart from
the PVC PCI IDs (naturally, because i915 does not and will not support
PVC). In preparation of using a shared file, add PVC PCI IDs to
i915_pciids.h.

Cc: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Cc: Lucas De Marchi &lt;lucas.demarchi@intel.com&gt;
Cc: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Cc: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Cc: Tvrtko Ursulin &lt;tursulin@ursulin.net&gt;
Reviewed-by: Andi Shyti &lt;andi.shyti@linux.intel.com&gt;
Acked-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/bc62e37cbfa3ed4dbfc75a7ca69b87afae6a727b.1729590029.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
</content>
</entry>
<entry>
<title>Merge drm/drm-next into drm-intel-next</title>
<updated>2024-10-17T16:52:05Z</updated>
<author>
<name>Rodrigo Vivi</name>
<email>rodrigo.vivi@intel.com</email>
</author>
<published>2024-10-17T16:52:05Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c141cf76918e25ec7bd433b47590e8c3f3d02542'/>
<id>urn:sha1:c141cf76918e25ec7bd433b47590e8c3f3d02542</id>
<content type='text'>
Needed to bring some KVM changes to be able to include a fix in our Kconfig.

Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/xe3lpd: reuse xe2lpd definition</title>
<updated>2024-10-11T21:34:32Z</updated>
<author>
<name>Clint Taylor</name>
<email>clinton.a.taylor@intel.com</email>
</author>
<published>2024-10-10T22:43:02Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7e6c0cb33f7c2aa78b20724239bd7bda3a882652'/>
<id>urn:sha1:7e6c0cb33f7c2aa78b20724239bd7bda3a882652</id>
<content type='text'>
xe3_lpd display is functionally identical to xe2_lpd for now so reuse
the device description.  A separate xe3 definition will be added in the
future if/when new feature flags are required.

Signed-off-by: Clint Taylor &lt;clinton.a.taylor@intel.com&gt;
Signed-off-by: Matt Atwood &lt;matthew.s.atwood@intel.com&gt;
Reviewed-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
Signed-off-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20241010224311.50133-2-matthew.s.atwood@intel.com
</content>
</entry>
<entry>
<title>drm/xe/ptl: Add PTL platform definition</title>
<updated>2024-10-08T16:19:50Z</updated>
<author>
<name>Haridhar Kalvala</name>
<email>haridhar.kalvala@intel.com</email>
</author>
<published>2024-10-08T01:35:08Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2298d8a81f2dc6987448e5ddd823f4892194f5b6'/>
<id>urn:sha1:2298d8a81f2dc6987448e5ddd823f4892194f5b6</id>
<content type='text'>
PTL is an integrated GPU based on the Xe3 architecture.

v2: explicitly turn off display until display patches land.

Bspec: 72574
Cc: Matt Roper &lt;matthew.d.roper@intel.com&gt;
Signed-off-by: Haridhar Kalvala &lt;haridhar.kalvala@intel.com&gt;
Signed-off-by: Matt Atwood &lt;matthew.s.atwood@intel.com&gt;
Reviewed-by: Shekhar Chauhan &lt;shekhar.chauhan@intel.com&gt;
Signed-off-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20241008013509.61233-6-matthew.s.atwood@intel.com
</content>
</entry>
<entry>
<title>drm/xe/pciid: Add new PCI id for ARL</title>
<updated>2024-09-20T20:39:04Z</updated>
<author>
<name>Dnyaneshwar Bhadane</name>
<email>dnyaneshwar.bhadane@intel.com</email>
</author>
<published>2024-09-12T11:59:06Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=35667a0330612bb25a689e4d3a687d47cede1d7a'/>
<id>urn:sha1:35667a0330612bb25a689e4d3a687d47cede1d7a</id>
<content type='text'>
Add new PCI id for ARL platform.

v2: Fix typo in PCI id (SaiTeja)

Signed-off-by: Dnyaneshwar Bhadane &lt;dnyaneshwar.bhadane@intel.com&gt;
Reviewed-by: Sai Teja Pottumuttu &lt;sai.teja.pottumuttu@intel.com&gt;
Reviewed-by: Tejas Upadhyay &lt;tejas.upadhyay@intel.com&gt;
Signed-off-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20240912115906.2730577-1-dnyaneshwar.bhadane@intel.com
</content>
</entry>
<entry>
<title>drm/i915/pciid: Add new PCI id for ARL</title>
<updated>2024-09-20T20:33:57Z</updated>
<author>
<name>Dnyaneshwar Bhadane</name>
<email>dnyaneshwar.bhadane@intel.com</email>
</author>
<published>2024-09-10T06:23:01Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=66b281fd8e599ddd7a00a89dc0dcfb7a13411441'/>
<id>urn:sha1:66b281fd8e599ddd7a00a89dc0dcfb7a13411441</id>
<content type='text'>
Add new PCI id for ARL platform.

Signed-off-by: Dnyaneshwar Bhadane &lt;dnyaneshwar.bhadane@intel.com&gt;
Reviewed-by: Nemesa Garg &lt;nemesa.garg@intel.com&gt;
Reviewed-by: Sai Teja Pottumuttu &lt;sai.teja.pottumuttu@intel.com&gt;
Signed-off-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20240910062301.2006782-1-dnyaneshwar.bhadane@intel.com
</content>
</entry>
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