<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/include/dt-bindings/clock, branch v4.2</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.2</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.2'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2015-07-02T02:22:00Z</updated>
<entry>
<title>Merge tag 'clk-for-linus-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux</title>
<updated>2015-07-02T02:22:00Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-07-02T02:22:00Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5f1201d515819e7cfaaac3f0a30ff7b556261386'/>
<id>urn:sha1:5f1201d515819e7cfaaac3f0a30ff7b556261386</id>
<content type='text'>
Pull clock framework updates from Michael Turquette:
 "The changes to the common clock framework for 4.2 are dominated by new
  drivers and updates to existing ones, as usual.

  There are some fixes to the framework itself and several cleanups for
  sparse warnings, etc"

* tag 'clk-for-linus-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (135 commits)
  clk: stm32: Add clock driver for STM32F4[23]xxx devices
  dt-bindings: Document the STM32F4 clock bindings
  cpufreq: exynos: remove Exynos4210 specific cpufreq driver support
  ARM: Exynos: switch to using generic cpufreq driver for Exynos4210
  clk: samsung: exynos4: add cpu clock configuration data and instantiate cpu clock
  clk: samsung: add infrastructure to register cpu clocks
  clk: add CLK_RECALC_NEW_RATES clock flag for Exynos cpu clock support
  doc: dt: add documentation for lpc1850-ccu clk driver
  clk: add lpc18xx ccu clk driver
  doc: dt: add documentation for lpc1850-cgu clk driver
  clk: add lpc18xx cgu clk driver
  clk: keystone: add support for post divider register for main pll
  clk: mvebu: flag the crypto clk as CLK_IGNORE_UNUSED
  clk: cygnus: remove Cygnus dummy clock binding
  clk: cygnus: add clock support for Broadcom Cygnus
  clk: Change bcm clocks build dependency
  clk: iproc: add initial common clock support
  clk: iproc: define Broadcom iProc clock binding
  MAINTAINERS: update email for Michael Turquette
  clk: meson: add some error handling in meson_clk_register_cpu()
  ...
</content>
</entry>
<entry>
<title>Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus</title>
<updated>2015-06-27T19:44:34Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-06-27T19:44:34Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=78c10e556ed904d5bfbd71e9cadd8ce8f25d6982'/>
<id>urn:sha1:78c10e556ed904d5bfbd71e9cadd8ce8f25d6982</id>
<content type='text'>
Pull MIPS updates from Ralf Baechle:

 - Improvements to the tlb_dump code
 - KVM fixes
 - Add support for appended DTB
 - Minor improvements to the R12000 support
 - Minor improvements to the R12000 support
 - Various platform improvments for BCM47xx
 - The usual pile of minor cleanups
 - A number of BPF fixes and improvments
 - Some improvments to the support for R3000 and DECstations
 - Some improvments to the ATH79 platform support
 - A major patchset for the JZ4740 SOC adding support for the CI20 platform
 - Add support for the Pistachio SOC
 - Minor BMIPS/BCM63xx platform support improvments.
 - Avoid "SYNC 0" as memory barrier when unlocking spinlocks
 - Add support for the XWR-1750 board.
 - Paul's __cpuinit/__cpuinitdata cleanups.
 - New Malta CPU board support large memory so enable ZONE_DMA32.

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (131 commits)
  MIPS: spinlock: Adjust arch_spin_lock back-off time
  MIPS: asmmacro: Ensure 64-bit FP registers are used with MSA
  MIPS: BCM47xx: Simplify handling SPROM revisions
  MIPS: Cobalt Don't use module_init in non-modular MTD registration.
  MIPS: BCM47xx: Move NVRAM driver to the drivers/firmware/
  MIPS: use for_each_sg()
  MIPS: BCM47xx: Don't select BCMA_HOST_PCI
  MIPS: BCM47xx: Add helper variable for storing NVRAM length
  MIPS: IRQ/IP27: Move IRQ allocation API to platform code.
  MIPS: Replace smp_mb with release barrier function in unlocks.
  MIPS: i8259: DT support
  MIPS: Malta: Basic DT plumbing
  MIPS: include errno.h for ENODEV in mips-cm.h
  MIPS: Define GCR_GIC_STATUS register fields
  MIPS: BPF: Introduce BPF ASM helpers
  MIPS: BPF: Use BPF register names to describe the ABI
  MIPS: BPF: Move register definition to the BPF header
  MIPS: net: BPF: Replace RSIZE with SZREG
  MIPS: BPF: Free up some callee-saved registers
  MIPS: Xtalk: Update xwidget.h with known Xtalk device numbers
  ...
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2015-06-26T18:43:59Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-06-26T18:43:59Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3d9f96d850e4bbfae24dc9aee03033dd77c81596'/>
<id>urn:sha1:3d9f96d850e4bbfae24dc9aee03033dd77c81596</id>
<content type='text'>
Pull ARM SoC DT updates from Kevin Hilman:
 "As usual, quite a few device-tree updates in ARM land.  There was one
  minor churn in DTs due to relicensing under a dual-license, and lots
  of little additions of new peripherals, features etc, but nothing
  really exciting to call to your attention.  Some higlights, focsuing
  on support for new SoCs and boards:

   - AT91: new boards: Overkiz,  Acme Systems' Arietta G25
   - tegra: HDA support
   - bcm: new platforms: Buffalo WXR-1900DHP, SmartRG SR400ac, ASUS
     RT-AC87U
   - mvebu: new platforms: Compulab CM-A510, Armada 385-based Linksys
     boards, DLink DNS-327L
   - OMAP: new platforms: Baltos IR5221, LogicPD Torpedo, Toby-Churchill
     SL50
   - ARM: added support for Juno r1 board
   - sunxi: A33 SoC support; new boards: A23 EVB, SinA33, GA10H-A33,
     Mele A1000G
   - imx: i.MX7D SoC support; new boards: Armadeus Systems APF6,
     Gateworks GW5510, and aristainetos2 boards
   - hisilicon: hi6220 SoC support; new boards: 96boards hikey"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (462 commits)
  ARM: hisi: revert changes from hisi/hip04-dt branch
  ARM: nomadik: set proper compatible for accelerometer
  ARM64: juno: add GPIO keys
  ARM: at91/dt: sama5d4: fix dma conf for aes, sha and tdes nodes
  ARM: dts: Introduce STM32F429 MCU
  ARM: socfpga: dts: enable ethernet for Arria10 devkit
  ARM: dts: k2l: fix the netcp range size
  ARM: dts: k2e: fix the netcp range size
  ARM: dts: k2hk: fix the netcp range size
  ARM: dts: k2l-evm: Add device bindings for netcp driver
  ARM: dts: k2e-evm: Add device bindings for netcp driver
  ARM: dts: k2hk-evm: Add device bindings for netcp driver
  ARM: BCM5301X: Add DT for Asus RT-AC87U
  ARM: BCM5301X: add IRQ numbers for PCIe controller
  ARM: BCM5301X: add NAND flash chip description
  arm64: dts: Add dts files for Hisilicon Hi6220 SoC
  clk: hi6220: Document devicetree bindings for hi6220 clock
  arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC
  ARM: at91/dt: sama5d4ek: mci0 uses slot 0
  ARM: at91/dt: kizbox: fix mismatch LED PWM device
  ...
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2015-06-26T18:34:35Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-06-26T18:34:35Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4aa705b18bf17c4ff33ff7bbcd3f0c596443fa81'/>
<id>urn:sha1:4aa705b18bf17c4ff33ff7bbcd3f0c596443fa81</id>
<content type='text'>
Pull ARM SoC platform support updates from Kevin Hilman:
 "Our SoC branch usually contains expanded support for new SoCs and
  other core platform code.  Some highlights from this round:

   - sunxi: SMP support for A23 SoC
   - socpga: big-endian support
   - pxa: conversion to common clock framework
   - bcm: SMP support for BCM63138
   - imx: support new I.MX7D SoC
   - zte: basic support for ZX296702 SoC"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits)
  ARM: zx: Add basic defconfig support for ZX296702
  ARM: dts: zx: add an initial zx296702 dts and doc
  clk: zx: add clock support to zx296702
  dt-bindings: Add #defines for ZTE ZX296702 clocks
  ARM: socfpga: fix build error due to secondary_startup
  MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS
  ARM: ep93xx: simone: support for SPI-based MMC/SD cards
  MAINTAINERS: update Shawn's email to use kernel.org one
  ARM: socfpga: support suspend to ram
  ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10
  ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5
  ARM: EXYNOS: register power domain driver from core_initcall
  ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs
  ARM: SAMSUNG: Constify platform_device_id
  ARM: EXYNOS: Constify irq_domain_ops
  ARM: EXYNOS: add coupled cpuidle support for Exynos3250
  ARM: EXYNOS: add exynos_get_boot_addr() helper
  ARM: EXYNOS: add exynos_set_boot_addr() helper
  ARM: EXYNOS: make exynos_core_restart() less verbose
  ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout
  ...
</content>
</entry>
<entry>
<title>DEVICETREE: Add Ingenic CGU binding documentation</title>
<updated>2015-06-21T19:53:13Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2015-05-24T15:11:34Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=fe4ef45b5b40c496aa0c85d059c713c79b804e06'/>
<id>urn:sha1:fe4ef45b5b40c496aa0c85d059c713c79b804e06</id>
<content type='text'>
Document the devicetree binding for Ingenic SoC CGUs, and add headers
defining the clock specifiers for clocks provided by the JZ4740 &amp; JZ4780
CGU blocks.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Ian Campbell &lt;ijc+devicetree@hellion.org.uk&gt;
Cc: Kumar Gala &lt;galak@codeaurora.org&gt;
Cc: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Mike Turquette &lt;mturquette@linaro.org&gt;
Cc: Pawel Moll &lt;pawel.moll@arm.com&gt;
Cc: Rob Herring &lt;robh+dt@kernel.org&gt;
Cc: devicetree@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10152/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>clk: add lpc18xx ccu clk driver</title>
<updated>2015-06-18T22:44:48Z</updated>
<author>
<name>Joachim Eastwood</name>
<email>manabian@gmail.com</email>
</author>
<published>2015-05-28T20:31:45Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=472cd304a36e0a1b21045ddc802ffb16a1cbac65'/>
<id>urn:sha1:472cd304a36e0a1b21045ddc802ffb16a1cbac65</id>
<content type='text'>
Add driver for NXP LPC18xx/43xx Clock Control Unit (CCU). The CCU
provides fine grained gating of most clocks present in the SoC.

Signed-off-by: Joachim Eastwood &lt;manabian@gmail.com&gt;
Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
</content>
</entry>
<entry>
<title>clk: add lpc18xx cgu clk driver</title>
<updated>2015-06-18T22:44:47Z</updated>
<author>
<name>Joachim Eastwood</name>
<email>manabian@gmail.com</email>
</author>
<published>2015-05-28T20:31:43Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b04e0b8fd5443b61c04e6103f16c5d1e1821e295'/>
<id>urn:sha1:b04e0b8fd5443b61c04e6103f16c5d1e1821e295</id>
<content type='text'>
Add driver for NXP LPC18xx/43xx Clock Generation Unit (CGU). The CGU
contains several clock generators and output stages that route the
clocks either directly to peripherals or to a Clock Control Unit
(CCU).

Signed-off-by: Joachim Eastwood &lt;manabian@gmail.com&gt;
Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
</content>
</entry>
<entry>
<title>clk: cygnus: add clock support for Broadcom Cygnus</title>
<updated>2015-06-18T19:36:39Z</updated>
<author>
<name>Ray Jui</name>
<email>rjui@broadcom.com</email>
</author>
<published>2015-05-05T18:13:21Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=61ca7b0c7fffb968bd16394daf05b7e888e9541e'/>
<id>urn:sha1:61ca7b0c7fffb968bd16394daf05b7e888e9541e</id>
<content type='text'>
The Broadcom Cygnus SoC is architected under the iProc architecture. It
has the following PLLs: ARMPLL, GENPLL, LCPLL0, MIPIPLL, all dervied
from an onboard crystal. Cygnus also has various ASIU clocks that are
derived directly from the onboard crystal.

Signed-off-by: Ray Jui &lt;rjui@broadcom.com&gt;
Reviewed-by: Scott Branden &lt;sbranden@broadcom.com&gt;
Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'zte/soc' into next/soc</title>
<updated>2015-06-11T23:19:29Z</updated>
<author>
<name>Kevin Hilman</name>
<email>khilman@linaro.org</email>
</author>
<published>2015-06-11T23:19:29Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4d48614ec45aa20d6a2cb7d2eb1368d7641c747d'/>
<id>urn:sha1:4d48614ec45aa20d6a2cb7d2eb1368d7641c747d</id>
<content type='text'>
* zte/soc:
  ARM: zx: Add basic defconfig support for ZX296702
  ARM: dts: zx: add an initial zx296702 dts and doc
  clk: zx: add clock support to zx296702
  dt-bindings: Add #defines for ZTE ZX296702 clocks
</content>
</entry>
<entry>
<title>dt-bindings: Add #defines for ZTE ZX296702 clocks</title>
<updated>2015-06-11T23:18:01Z</updated>
<author>
<name>Jun Nie</name>
<email>jun.nie@linaro.org</email>
</author>
<published>2015-06-04T03:21:00Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f3519dc6f090eb2315af58ab46857f0c6f45bae4'/>
<id>urn:sha1:f3519dc6f090eb2315af58ab46857f0c6f45bae4</id>
<content type='text'>
Add clocks defines for the global clock controller
found on ZTE ZX296702 SoCs.

Signed-off-by: Jun Nie &lt;jun.nie@linaro.org&gt;
Acked-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Kevin Hilman &lt;khilman@linaro.org&gt;
</content>
</entry>
</feed>
