linux/include/dt-bindings/clock, branch v5.14

dt-bindings: clock: r9a07g044-cpg: Update clock/reset definitions

2021-07-12T08:52:03Z

Update clock and reset definitions as per RZ/G2L_clock_list_r02_02.xlsx and RZ/G2L HW(Rev.0.50) manual. Update {GIC,IA55,SCIF} clock and reset entries in the CPG driver, and separate reset from module clocks in order to handle them efficiently. Update the SCIF0 clock and reset index in the SoC DTSI. Signed-off-by: Biju Das Reviewed-by: Lad Prabhakar Link: https://lore.kernel.org/r/20210626081344.5783-6-biju.das.jz@bp.renesas.com Link: https://lore.kernel.org/r/20210626081344.5783-7-biju.das.jz@bp.renesas.com Link: https://lore.kernel.org/r/20210626081344.5783-8-biju.das.jz@bp.renesas.com [geert: Squashed 3 commits] Signed-off-by: Geert Uytterhoeven

Merge tag 'pm-5.14-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

2021-07-07T20:22:59Z

Pull more power management updates from Rafael Wysocki: "These include cpufreq core simplifications and fixes, cpufreq driver updates, cpuidle driver update, a generic power domains (genpd) locking fix and a debug-related simplification of the PM core. Specifics: - Drop the ->stop_cpu() (not really useful) and ->resolve_freq() (unused) cpufreq driver callbacks and modify the users of the former accordingly (Viresh Kumar, Rafael Wysocki). - Add frequency invariance support to the ACPI CPPC cpufreq driver again along with the related fixes and cleanups (Viresh Kumar). - Update the Meditak, qcom and SCMI ARM cpufreq drivers (Fabien Parent, Seiya Wang, Sibi Sankar, Christophe JAILLET). - Rename black/white-lists in the DT cpufreq driver (Viresh Kumar). - Add generic performance domains support to the dvfs DT bindings (Sudeep Holla). - Refine locking in the generic power domains (genpd) support code to avoid lock dependency issues (Stephen Boyd). - Update the MSM and qcom ARM cpuidle drivers (Bartosz Dudziak). - Simplify the PM core debug code by using ktime_us_delta() to compute time interval lengths (Mark-PK Tsai)" * tag 'pm-5.14-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (21 commits) PM: domains: Shrink locking area of the gpd_list_lock PM: sleep: Use ktime_us_delta() in initcall_debug_report() cpufreq: CPPC: Add support for frequency invariance arch_topology: Avoid use-after-free for scale_freq_data cpufreq: CPPC: Pass structure instance by reference cpufreq: CPPC: Fix potential memleak in cppc_cpufreq_cpu_init cpufreq: Remove ->resolve_freq() cpufreq: Reuse cpufreq_driver_resolve_freq() in __cpufreq_driver_target() cpufreq: Remove the ->stop_cpu() driver callback cpufreq: powernv: Migrate to ->exit() callback instead of ->stop_cpu() cpufreq: CPPC: Migrate to ->exit() callback instead of ->stop_cpu() cpufreq: intel_pstate: Combine ->stop_cpu() and ->offline() cpuidle: qcom: Add SPM register data for MSM8226 dt-bindings: arm: msm: Add SAW2 for MSM8226 dt-bindings: cpufreq: update cpu type and clock name for MT8173 SoC clk: mediatek: remove deprecated CLK_INFRA_CA57SEL for MT8173 SoC cpufreq: dt: Rename black/white-lists cpufreq: scmi: Fix an error message cpufreq: mediatek: add support for mt8365 dt-bindings: dvfs: Add support for generic performance domains ...

Merge branches 'clk-st', 'clk-si' and 'clk-hisilicon' into clk-next

2021-06-29T20:33:42Z

- Stop using clock-output-names in ST clk drivers * clk-st: dt-bindings: clock: st: clkgen-fsyn: add new introduced compatible clk: st: clkgen-fsyn: embed soc clock outputs within compatible data dt-bindings: clock: st: clkgen-pll: add new introduced compatible clk: st: clkgen-pll: embed soc clock outputs within compatible data dt-bindings: clock: st: flexgen: add new introduced compatible clk: st: flexgen: embed soc clock outputs within compatible data clk: st: clkgen-pll: remove unused variable of struct clkgen_pll * clk-si: clk: si5341: Add sysfs properties to allow checking/resetting device faults clk: si5341: Add silabs,iovdd-33 property clk: si5341: Add silabs,xaxb-ext-clk property clk: si5341: Allow different output VDD_SEL values clk: si5341: Update initialization magic clk: si5341: Check for input clock presence and PLL lock on startup clk: si5341: Avoid divide errors due to bogus register contents clk: si5341: Wait for DEVICE_READY on startup dt-bindings: clock: clk-si5341: Add new attributes * clk-hisilicon: clk: hisilicon: Add clock driver for hi3559A SoC dt-bindings: Document the hi3559a clock bindings

Merge branches 'clk-lmk04832', 'clk-stm', 'clk-rohm', 'clk-actions' and 'clk-ingenic' into clk-next

2021-06-29T20:33:22Z

- Texas Instruments' LMK04832 Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs - Support secure mode of STM32MP1 SoCs - Improve clock support for Actions S500 SoC * clk-lmk04832: clk: lmk04832: Use of match table clk: lmk04832: Depend on SPI clk: lmk04832: add support for digital delay clk: add support for the lmk04832 dt-bindings: clock: add ti,lmk04832 bindings * clk-stm: clk: stm32mp1: new compatible for secure RCC support dt-bindings: clock: stm32mp1 new compatible for secure rcc dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains on stm32mp15 dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15 dt-bindings: clock: add IDs for SCMI clocks on stm32mp15 reset: stm32mp1: remove stm32mp1 reset clk: stm32mp1: move RCC reset controller into RCC clock driver clk: stm32mp1: convert to module driver clk: stm32mp1: remove intermediate pll clocks clk: stm32mp1: merge 'ck_hse_rtc' and 'ck_rtc' into one clock clk: stm32mp1: merge 'clk-hsi-div' and 'ck_hsi' into one clock * clk-rohm: clk: bd718xx: Drop BD70528 support * clk-actions: clk: actions: Add NIC and ETHERNET clock support for Actions S500 SoC dt-bindings: clock: Add NIC and ETHERNET bindings for Actions S500 SoC clk: actions: Fix AHPPREDIV-H-AHB clock chain on Owl S500 SoC clk: actions: Fix bisp_factor_table based clocks on Owl S500 SoC clk: actions: Fix SD clocks factor table on Owl S500 SoC clk: actions: Fix UART clock dividers on Owl S500 SoC * clk-ingenic: clk: ingenic: Add support for the JZ4760 clk: ingenic: Support overriding PLLs M/N/OD calc algorithm clk: ingenic: Remove pll_info.no_bypass_bit clk: ingenic: Read bypass register only when there is one clk: Support bypassing dividers dt-bindings: clock: ingenic: Add ingenic,jz4760{,b}-cgu compatibles

Merge branches 'clk-legacy', 'clk-vc5', 'clk-allwinner', 'clk-nvidia' and 'clk-imx' into clk-next

2021-06-29T20:33:10Z

* clk-legacy: clkdev: remove unused clkdev_alloc() interfaces clkdev: remove CONFIG_CLKDEV_LOOKUP m68k: coldfire: remove private clk_get/clk_put m68k: coldfire: use clkdev_lookup on most coldfire mips: ralink: convert to CONFIG_COMMON_CLK mips: ar7: convert to CONFIG_COMMON_CLK mips: ar7: convert to clkdev_lookup * clk-vc5: clk: vc5: fix output disabling when enabling a FOD * clk-allwinner: clk: sunxi-ng: v3s: fix incorrect postdivider on pll-audio * clk-nvidia: clk: tegra: clk-tegra124-dfll-fcpu: don't use devm functions for regulator clk: tegra: tegra124-emc: Fix clock imbalance in emc_set_timing() clk: tegra: Add stubs needed for compile-testing clk: tegra: Don't deassert reset on enabling clocks clk: tegra: Mark external clocks as not having reset control clk: tegra: cclk: Handle thermal DIV2 CPU frequency throttling clk: tegra: Don't allow zero clock rate for PLLs clk: tegra: Halve SCLK rate on Tegra20 clk: tegra: Ensure that PLLU configuration is applied properly clk: tegra: Fix refcounting of gate clocks clk: tegra30: Use 300MHz for video decoder by default * clk-imx: clk: imx8mq: remove SYS PLL 1/2 clock gates clk: imx: scu: Do not enable runtime PM for CPU clks clk: imx: scu: add parent save and restore clk: imx: scu: Only save DC SS clock using non-cached clock rate clk: imx: scu: Add A72 frequency scaling support clk: imx: scu: Add A53 frequency scaling support clk: imx: scu: bypass pi_pll enable status restore clk: imx: scu: detach pd if can't power up clk: imx: scu: bypass cpu clock save and restore clk: imx: scu: add parallel port clock ops clk: imx: scu: add more scu clocks clk: imx: scu: add enet rgmii gpr clocks clk: imx8qm: add clock valid resource checking clk: imx8qxp: add clock valid checking mechnism clk: imx: scu: add gpr clocks support clk: imx: scu: remove legacy scu clock binding support dt-bindings: arm: imx: scu: drop deprecated legacy clock binding dt-bindings: arm: imx: scu: fix naming typo of clk compatible string clk: imx: Remove the audio ipg clock from imx8mp

Merge branches 'clk-qcom', 'clk-versatile', 'clk-renesas', 'clk-sifive' and 'clk-ti' into clk-next

2021-06-29T20:32:46Z

- duty cycle setting support on qcom clks - qcom MDM9607 GCC - qcom sc8180x display clks - qcom SM6125 GCC - Add TI am33xx spread spectrum clock support * clk-qcom: (22 commits) clk: qcom: clk-alpha-pll: fix CAL_L write in alpha_pll_fabia_prepare clk: qcom: Add camera clock controller driver for SM8250 dt-bindings: clock: add QCOM SM8250 camera clock bindings clk: qcom: clk-alpha-pll: add support for zonda pll clk/qcom: Remove unused variables clk: qcom: smd-rpmcc: Add support for MSM8226 rpm clocks clk: qcom: gcc: Add support for Global Clock controller found on MSM8226 dt-bindings: clock: qcom: Add MSM8226 GCC clock bindings clk: qcom: Add SM6125 (TRINKET) GCC driver dt-bindings: clk: qcom: gcc-sm6125: Document SM6125 GCC driver clk: qcom: gcc: Add support for a new frequency for SC7280 clk: qcom: smd-rpm: Fix wrongly assigned RPM_SMD_PNOC_CLK dt-bindings: clock: qcom: rpmcc: Document MSM8226 compatible clk: qcom: dispcc-sm8250: Add EDP clocks clk: qcom: dispcc-sm8250: Add sc8180x support clk: qcom: smd-rpm: De-duplicate identical entries clk: qcom: smd-rpm: Switch to parent_data clk: qcom: Add MDM9607 GCC driver dt-bindings: clock: Add MDM9607 GCC clock bindings clk: qcom: cleanup some dev_err_probe() calls ... * clk-versatile: clk: versatile: Depend on HAS_IOMEM clk: versatile: remove dependency on ARCH_* * clk-renesas: (22 commits) clk: renesas: Add support for R9A07G044 SoC clk: renesas: Add CPG core wrapper for RZ/G2L SoC dt-bindings: clock: renesas: Document RZ/G2L SoC CPG driver dt-bindings: clock: Add r9a07g044 CPG Clock Definitions clk: renesas: r8a77995: Add ZA2 clock clk: renesas: cpg-mssr: Make srstclr[] comment block consistent clk: renesas: cpg-mssr: Remove unused [RM]MSTPCR() definitions clk: renesas: r9a06g032: Switch to .determine_rate() clk: renesas: div6: Implement range checking clk: renesas: div6: Consider all parents for requested rate clk: renesas: div6: Switch to .determine_rate() clk: renesas: div6: Simplify src mask handling clk: renesas: div6: Use clamp() instead of clamp_t() clk: renesas: rcar-usb2-clock-sel: Fix error handling in .probe() clk: renesas: r8a779a0: Add ISPCS clocks clk: renesas: rcar-gen3: Add boost support to Z clocks clk: renesas: rcar-gen3: Add custom clock for PLLs clk: renesas: rcar-gen3: Increase Z clock accuracy clk: renesas: rcar-gen3: Grammar s/dependent of/dependent on/ clk: renesas: rcar-gen3: Remove superfluous masking in cpg_z_clk_set_rate() ... * clk-sifive: clk: analogbits: fix doc warning in wrpll-cln28hpc.c clk: sifive: Fix kernel-doc * clk-ti: drivers: ti: remove redundant error message in adpll.c clk: keystone: syscon-clk: Add support for AM64 specific epwm-tbclk dt-bindings: clock: ehrpwm: Add support for AM64 specific compatible clk: ti: add am33xx/am43xx spread spectrum clock support ARM: dts: am43xx-clocks: add spread spectrum support ARM: dts: am33xx-clocks: add spread spectrum support dt-bindings: ti: dpll: add spread spectrum support clk: ti: fix typo in routine description

dt-bindings: clock: add IDs for SCMI clocks on stm32mp15

2021-06-28T23:09:09Z

stm32mp15 TZ secure firmware provides SCMI clocks for oscillators, some PLL output and few secure aware interfaces. This change defines the SCMI clock identifiers used by SCMI agents and servers. Server SCMI0 exposes clocks and reset controllers for resources under RCC[TZEN] configuration control. Server SCMI1 exposes clocks for resources under RCC[MCKPROT] control. Signed-off-by: Etienne Carriere Signed-off-by: Gabriel Fernandez Acked-by: Rob Herring Link: https://lore.kernel.org/r/20210617051814.12018-8-gabriel.fernandez@foss.st.com Signed-off-by: Stephen Boyd

dt-bindings: Document the hi3559a clock bindings

2021-06-28T03:05:41Z

Add DT bindings documentation for hi3559a SoC clock. Signed-off-by: Dongjiu Geng Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/1616498973-47067-2-git-send-email-gengdongjiu1@gmail.com Signed-off-by: Stephen Boyd

clk: ingenic: Add support for the JZ4760

2021-06-28T02:49:18Z

Add the CGU code and the compatible string to the TCU driver to support the JZ4760 SoC. Signed-off-by: Paul Cercueil Link: https://lore.kernel.org/r/20210530164923.18134-7-paul@crapouillou.net Signed-off-by: Stephen Boyd

dt-bindings: clock: Add NIC and ETHERNET bindings for Actions S500 SoC

2021-06-28T01:45:16Z

Add the missing NIC and ETHERNET clock bindings constants for Actions Semi Owl S500 SoC. Signed-off-by: Cristian Ciocaltea Acked-by: Rob Herring Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/1d0902cf073f76a1a602410061481ccb3fc36a72.1623354574.git.cristian.ciocaltea@gmail.com Signed-off-by: Stephen Boyd