<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/include/dt-bindings/clock, branch v5.4</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.4</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.4'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2019-09-22T16:30:30Z</updated>
<entry>
<title>Merge tag 'mips_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux</title>
<updated>2019-09-22T16:30:30Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2019-09-22T16:30:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5c6bd5de3c2e5bc8a17451e281ed2613375a7fd5'/>
<id>urn:sha1:5c6bd5de3c2e5bc8a17451e281ed2613375a7fd5</id>
<content type='text'>
Pull MIPS updates from Paul Burton:
 "Main MIPS changes:

   - boot_mem_map is removed, providing a nice cleanup made possible by
     the recent removal of bootmem.

   - Some fixes to atomics, in general providing compiler barriers for
     smp_mb__{before,after}_atomic plus fixes specific to Loongson CPUs
     or MIPS32 systems using cmpxchg64().

   - Conversion to the new generic VDSO infrastructure courtesy of
     Vincenzo Frascino.

   - Removal of undefined behavior in set_io_port_base(), fixing the
     behavior of some MIPS kernel configurations when built with recent
     clang versions.

   - Initial MIPS32 huge page support, functional on at least Ingenic
     SoCs.

   - pte_special() is now supported for some configurations, allowing
     among other things generic fast GUP to be used.

   - Miscellaneous fixes &amp; cleanups.

  And platform specific changes:

   - Major improvements to Ingenic SoC support from Paul Cercueil,
     mostly enabled by the inclusion of the new TCU (timer-counter unit)
     drivers he's spent a very patient year or so working on. Plus some
     fixes for X1000 SoCs from Zhou Yanjie.

   - Netgear R6200 v1 systems are now supported by the bcm47xx platform.

   - DT updates for BMIPS, Lantiq &amp; Microsemi Ocelot systems"

* tag 'mips_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (89 commits)
  MIPS: Detect bad _PFN_SHIFT values
  MIPS: Disable pte_special() for MIPS32 with RiXi
  MIPS: ralink: deactivate PCI support for SOC_MT7621
  mips: compat: vdso: Use legacy syscalls as fallback
  MIPS: Drop Loongson _CACHE_* definitions
  MIPS: tlbex: Remove cpu_has_local_ebase
  MIPS: tlbex: Simplify r3k check
  MIPS: Select R3k-style TLB in Kconfig
  MIPS: PCI: refactor ioc3 special handling
  mips: remove ioremap_cachable
  mips/atomic: Fix smp_mb__{before,after}_atomic()
  mips/atomic: Fix loongson_llsc_mb() wreckage
  mips/atomic: Fix cmpxchg64 barriers
  MIPS: Octeon: remove duplicated include from dma-octeon.c
  firmware: bcm47xx_nvram: Allow COMPILE_TEST
  firmware: bcm47xx_nvram: Correct size_t printf format
  MIPS: Treat Loongson Extensions as ASEs
  MIPS: Remove dev_err() usage after platform_get_irq()
  MIPS: dts: mscc: describe the PTP ready interrupt
  MIPS: dts: mscc: describe the PTP register range
  ...
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2019-09-20T22:53:02Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2019-09-20T22:53:02Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f97c81dc6ca5996560b3944064f63fc87eb18d00'/>
<id>urn:sha1:f97c81dc6ca5996560b3944064f63fc87eb18d00</id>
<content type='text'>
Pull ARM SoC late updates from Arnd Bergmann:
 "This is some material that we picked up into our tree late or that had
  complex inter-depondencies. The fact that there are these
  interdependencies tends to meant that these are often actually the
  most interesting new additions:

   - The new Aspeed AST2600 baseboard management controller is added,
     this is a Cortex-A7 based follow-up to the ARM11 based AST2500 and
     had some dependencies on other device drivers.

   - After many years, support for the MMP2 based OLPC XO-1.75 finally
     makes it into the kernel.

   - The Armada 3720 based Turris Mox open source router platform is a
     late addition and it follows some preparatory work across multiple
     branches.

   - The OMAP2+ platform had some large-scale cleanup involving driver
     changes and DT changes, here we finish it off, dropping a lot of
     the now-unused platform data.

   - The TI K3 platform that got added for 5.3 gains a lot more support
     for individual bits on the SoC, this part just came late for the
     merge window"

[ This pull request itself wasn't actually sent late at all by Arnd, but
  I waited on the branches that it used to be pulled first, so it ends
  up being merged much later than the other ARM SoC pull requests this
  merge window     - Linus ]

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (57 commits)
  ARM: dts: dir685: Drop spi-cpol from the display
  ARM: dts: aspeed: Add AST2600 pinmux nodes
  ARM: dts: aspeed: Add AST2600 and EVB
  ARM: exynos: Enable support for ARM architected timers
  ARM: samsung: Fix system restart on S3C6410
  ARM: dts: mmp2: add OLPC XO 1.75 machine
  ARM: dts: mmp2: rename the USB PHY node
  ARM: dts: mmp2: specify reg-shift for the UARTs
  ARM: dts: mmp2: add camera interfaces
  ARM: dts: mmp2: fix the SPI nodes
  ARM: dts: mmp2: trivial whitespace fix
  arm64: dts: marvell: add DTS for Turris Mox
  dt-bindings: marvell: document Turris Mox compatible
  arm64: dts: marvell: armada-37xx: add SPI CS1 pinctrl
  arm64: dts: ti: k3-j721e-main: Fix gic-its node unit-address
  arm64: dts: ti: k3-am65-main: Fix gic-its node unit-address
  arm64: dts: ti: k3-j721e-main: Add hwspinlock node
  arm64: dts: ti: k3-am65-main: Add hwspinlock node
  arm64: dts: k3-j721e: Add gpio-keys on common processor board
  dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721E
  ...
</content>
</entry>
<entry>
<title>Merge branches 'clk-cdce-regulator', 'clk-bcm', 'clk-evict-parent-cache' and 'clk-actions' into clk-next</title>
<updated>2019-09-19T22:31:46Z</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2019-09-19T22:31:46Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b6c444de05acb10c6497549d1d0c6fb7e5883742'/>
<id>urn:sha1:b6c444de05acb10c6497549d1d0c6fb7e5883742</id>
<content type='text'>
 - Add regulator support to the cdce925 clk driver
 - Add support for Raspberry Pi 4 bcm2711 SoCs
 - Evict parents from parent cache when they're unregistered

* clk-cdce-regulator:
  clk: clk-cdce925: Add regulator support
  dt-bindings: clock: cdce925: Add regulator documentation

* clk-bcm:
  clk: bcm2835: Mark PLLD_PER as CRITICAL
  clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support
  clk: bcm2835: Introduce SoC specific clock registration
  dt-bindings: bcm2835-cprman: Add bcm2711 support

* clk-evict-parent-cache:
  clk: Evict unregistered clks from parent caches

* clk-actions:
  clk: actions: Fix factor clk struct member access
</content>
</entry>
<entry>
<title>Merge branches 'clk-renesas', 'clk-rockchip', 'clk-const' and 'clk-simplify' into clk-next</title>
<updated>2019-09-19T22:31:41Z</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2019-09-19T22:31:41Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=91bcbc11d65fa7023fe9838813588e1d335434f7'/>
<id>urn:sha1:91bcbc11d65fa7023fe9838813588e1d335434f7</id>
<content type='text'>
* clk-renesas:
  clk: renesas: cpg-mssr: Set GENPD_FLAG_ALWAYS_ON for clock domain
  clk: renesas: r9a06g032: Set GENPD_FLAG_ALWAYS_ON for clock domain
  clk: renesas: mstp: Set GENPD_FLAG_ALWAYS_ON for clock domain
  dt-bindings: clk: emev2: Rename bindings documentation file
  clk: renesas: rcar-usb2-clock-sel: Use devm_platform_ioremap_resource() helper

* clk-rockchip:
  clk: rockchip: Add clock controller for the rk3308
  clk: rockchip: Add dt-binding header for rk3308
  dt-bindings: Add bindings for rk3308 clock controller
  clk: rockchip: Fix -Wunused-const-variable in rv1108 clk driver

* clk-const:
  clk: spear: Make structure i2s_sclk_masks constant

* clk-simplify:
  clk/ti: Use kmemdup rather than duplicating its implementation
  clk: fix devm_platform_ioremap_resource.cocci warnings
</content>
</entry>
<entry>
<title>Merge branches 'clk-init-destroy', 'clk-doc', 'clk-imx' and 'clk-allwinner' into clk-next</title>
<updated>2019-09-19T22:31:27Z</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2019-09-19T22:31:27Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a1ff1ce30036eca05bce1239159311bc3ef8f363'/>
<id>urn:sha1:a1ff1ce30036eca05bce1239159311bc3ef8f363</id>
<content type='text'>
 - Set clk_init_data pointer inside clk_hw to NULL after registration

* clk-init-destroy:
  clk: Overwrite clk_hw::init with NULL during clk_register()
  clk: sunxi: Don't call clk_hw_get_name() on a hw that isn't registered
  clk: ti: Don't reference clk_init_data after registration
  clk: qcom: Remove error prints from DFS registration
  rtc: sun6i: Don't reference clk_init_data after registration
  clk: zx296718: Don't reference clk_init_data after registration
  clk: milbeaut: Don't reference clk_init_data after registration
  clk: socfpga: deindent code to proper indentation
  phy: ti: am654-serdes: Don't reference clk_init_data after registration
  clk: sprd: Don't reference clk_init_data after registration
  clk: socfpga: Don't reference clk_init_data after registration
  clk: sirf: Don't reference clk_init_data after registration
  clk: qcom: Don't reference clk_init_data after registration
  clk: meson: axg-audio: Don't reference clk_init_data after registration
  clk: lochnagar: Don't reference clk_init_data after registration
  clk: actions: Don't reference clk_init_data after registration

* clk-doc:
  clk: remove extra ---help--- tags in Kconfig
  clk: add include guard to clk-conf.h
  clk: Document of_parse_clkspec() some more
  clk: Remove extraneous 'for' word in comments

* clk-imx: (32 commits)
  clk: imx: imx8mn: fix pll mux bit
  clk: imx: imx8mm: fix pll mux bit
  clk: imx: clk-pll14xx: unbypass PLL by default
  clk: imx: pll14xx: avoid glitch when set rate
  clk: imx: imx8mn: fix audio pll setting
  clk: imx8mn: Add necessary frequency support for ARM PLL table
  clk: imx8mn: Add missing rate_count assignment for each PLL structure
  clk: imx8mn: fix int pll clk gate
  clk: imx8mn: Add GIC clock
  clk: imx8mn: Fix incorrect parents
  clk: imx8mm: Fix incorrect parents
  clk: imx8mq: Fix sys3 pll references
  clk: imx8mq: Unregister clks when of_clk_add_provider failed
  clk: imx8mm: Unregister clks when of_clk_add_provider failed
  clk: imx8mq: Mark AHB clock as critical
  clk: imx8mn: Keep uart clocks on for early console
  clk: imx: Remove unused function statement
  clk: imx7ulp: Make sure earlycon's clock is enabled
  clk: imx8mm: Switch to platform driver
  clk: imx: imx8mm: fix audio pll setting
  ...

* clk-allwinner:
  clk: sunxi-ng: h6: Allow I2S to change parent rate
  clk: sunxi-ng: v3s: add Allwinner V3 support
  clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocks
  dt-bindings: clk: sunxi-ccu: add compatible string for V3 CCU
  clk: sunxi-ng: v3s: add the missing PLL_DDR1
</content>
</entry>
<entry>
<title>Merge branches 'clk-qcom', 'clk-mtk', 'clk-armada', 'clk-ingenic' and 'clk-meson' into clk-next</title>
<updated>2019-09-19T22:30:59Z</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2019-09-19T22:30:59Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f5c7305db30b5a15d341d3a7009a55c4357d459c'/>
<id>urn:sha1:f5c7305db30b5a15d341d3a7009a55c4357d459c</id>
<content type='text'>
 - Support qcom SM8150 RPMh clks
 - Set floor ops for qcom sd clks
 - Support qcom QCS404 WCSS clks
 - Support for Mediatek MT6779 SoCs
 - Add CPU clock support for Armada 7K/8K (specifically AP806 and AP807)

* clk-qcom:
  clk: qcom: rcg: Return failure for RCG update
  clk: qcom: fix QCS404 TuringCC regmap
  clk: qcom: clk-rpmh: Add support for SM8150
  dt-bindings: clock: Document SM8150 rpmh-clock compatible
  clk: qcom: clk-rpmh: Convert to parent data scheme
  dt-bindings: clock: Document the parent clocks
  clk: qcom: gcc: Use floor ops for SDCC clocks
  clk: qcom: gcc-qcs404: Use floor ops for sdcc clks
  clk: qcom: gcc-sdm845: Use floor ops for sdcc clks
  clk: qcom: define probe by index API as common API
  clk: qcom: Add WCSS gcc clock control for QCS404
  clk: qcom: msm8916: Don't build by default
  clk: qcom: gcc: Add global clock controller driver for SM8150
  dt-bindings: clock: Document gcc bindings for SM8150
  clk: qcom: clk-alpha-pll: Add support for Trion PLLs
  clk: qcom: clk-alpha-pll: Remove post_div_table checks
  clk: qcom: clk-alpha-pll: Remove unnecessary cast

* clk-mtk:
  clk: mediatek: Runtime PM support for MT8183 mcucfg clock provider
  clk: mediatek: Register clock gate with device
  clk: mediatek: add pericfg clocks for MT8183
  dt-bindings: clock: mediatek: add pericfg for MT8183
  clk: mediatek: Add MT6779 clock support
  clk: mediatek: Add dt-bindings for MT6779 clocks
  dt-bindings: mediatek: bindings for MT6779 clk
  clk: reset: Modify reset-controller driver

* clk-armada:
  clk: mvebu: ap80x: add AP807 clock support
  clk: mvebu: ap806: Prepare the introduction of AP807 clock support
  clk: mvebu: ap806: add AP-DCLK (hclk) to system controller driver
  clk: mvebu: ap806: be more explicit on what SaR is
  clk: mvebu: ap80x-cpu: add AP807 CPU clock support
  clk: mvebu: ap806-cpu: prepare mapping of AP807 CPU clock
  dt-bindings: ap806: Document AP807 clock compatible
  dt-bindings: ap80x: Document AP807 CPU clock compatible
  clk: mvebu: ap806: Fix clock name for the cluster
  clk: mvebu: add CPU clock driver for Armada 7K/8K
  clk: mvebu: add helper file for Armada AP and CP clocks
  dt-bindings: ap806: add the cluster clock node in the syscon file

* clk-ingenic:
  clk: ingenic: Use CLK_OF_DECLARE_DRIVER macro
  clk: ingenic/jz4740: Fix "pll half" divider not read/written properly

* clk-meson: (23 commits)
  clk: meson: g12a: add support for SM1 CPU 1, 2 &amp; 3 clocks
  clk: meson: g12a: add support for SM1 DynamIQ Shared Unit clock
  clk: meson: g12a: add support for SM1 GP1 PLL
  dt-bindings: clk: meson: add sm1 periph clock controller bindings
  clk: meson: axg-audio: add g12a reset support
  dt-bindings: clock: meson: add resets to the audio clock controller
  clk: meson: g12a: expose CPUB clock ID for G12B
  clk: meson: g12a: add notifiers to handle cpu clock change
  clk: meson: add g12a cpu dynamic divider driver
  clk: core: introduce clk_hw_set_parent()
  clk: meson: remove clk input helper
  clk: meson: remove ee input bypass clocks
  clk: meson: clk-regmap: migrate to new parent description method
  clk: meson: meson8b: migrate to the new parent description method
  clk: meson: axg: migrate to the new parent description method
  clk: meson: gxbb: migrate to the new parent description method
  clk: meson: g12a: migrate to the new parent description method
  clk: meson: remove ao input bypass clocks
  clk: meson: axg-aoclk: migrate to the new parent description method
  clk: meson: gxbb-aoclk: migrate to the new parent description method
  ...
</content>
</entry>
<entry>
<title>clk: mediatek: add pericfg clocks for MT8183</title>
<updated>2019-09-17T17:17:41Z</updated>
<author>
<name>Chunfeng Yun</name>
<email>chunfeng.yun@mediatek.com</email>
</author>
<published>2019-08-28T08:22:13Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f9e55ac22ce9246c085e1c97ddda93608ce17eaf'/>
<id>urn:sha1:f9e55ac22ce9246c085e1c97ddda93608ce17eaf</id>
<content type='text'>
Add pericfg clocks for MT8183, it's used when support USB
remote wakeup

Cc: Weiyi Lu &lt;weiyi.lu@mediatek.com&gt;
Signed-off-by: Chunfeng Yun &lt;chunfeng.yun@mediatek.com&gt;
Link: https://lkml.kernel.org/r/1566980533-28282-2-git-send-email-chunfeng.yun@mediatek.com
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: bcm2835-cprman: Add bcm2711 support</title>
<updated>2019-09-17T16:55:30Z</updated>
<author>
<name>Stefan Wahren</name>
<email>wahrenst@gmx.net</email>
</author>
<published>2019-08-18T16:23:41Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=80766f87263c527b6c66a297e8d9c1d961d37eba'/>
<id>urn:sha1:80766f87263c527b6c66a297e8d9c1d961d37eba</id>
<content type='text'>
The new BCM2711 supports an additional clock for the emmc2 block.
So we need an additional compatible.

Signed-off-by: Stefan Wahren &lt;wahrenst@gmx.net&gt;
Acked-by: Eric Anholt &lt;eric@anholt.net&gt;
Reviewed-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
</entry>
<entry>
<title>Merge branch 'aspeed/dt-3' into arm/late</title>
<updated>2019-09-12T10:06:07Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2019-09-12T10:06:07Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=375a7baddbdd62c61a41b6c25437b425d7aeeea6'/>
<id>urn:sha1:375a7baddbdd62c61a41b6c25437b425d7aeeea6</id>
<content type='text'>
* aspeed/dt-3:
  ARM: dts: aspeed: Add AST2600 pinmux nodes
  ARM: dts: aspeed: Add AST2600 and EVB
  clk: Add support for AST2600 SoC
  clk: aspeed: Move structures to header
  clk: aspeed: Add SDIO gate
</content>
</entry>
<entry>
<title>clk: mediatek: Add dt-bindings for MT6779 clocks</title>
<updated>2019-09-09T16:37:29Z</updated>
<author>
<name>mtk01761</name>
<email>wendell.lin@mediatek.com</email>
</author>
<published>2019-08-19T09:21:40Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=85b18fe7049466cb15e7d33b51aa51854e0e05e7'/>
<id>urn:sha1:85b18fe7049466cb15e7d33b51aa51854e0e05e7</id>
<content type='text'>
Add MT6779 clock dt-bindings, include topckgen, apmixedsys,
infracfg, and subsystem clocks.

Signed-off-by: mtk01761 &lt;wendell.lin@mediatek.com&gt;
Link: https://lkml.kernel.org/r/1566206502-4347-10-git-send-email-mars.cheng@mediatek.com
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
</feed>
