<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/include/dt-bindings/memory, branch v6.0</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.0</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.0'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2022-07-08T14:17:04Z</updated>
<entry>
<title>dt-bindings: Add headers for Host1x and VIC on Tegra234</title>
<updated>2022-07-08T14:17:04Z</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2022-06-27T14:19:57Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=63a6ef2360bdeffcdd41bcdd86937b6db17b573d'/>
<id>urn:sha1:63a6ef2360bdeffcdd41bcdd86937b6db17b573d</id>
<content type='text'>
Add clock, memory controller, powergate and reset dt-binding headers
for Host1x and VIC on Tegra234.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: memory: Add Tegra234 MGBE memory clients</title>
<updated>2022-07-08T08:20:59Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2022-07-06T03:12:53Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=833f5a7eb2889067c45e5367aa7d5516df17520d'/>
<id>urn:sha1:833f5a7eb2889067c45e5367aa7d5516df17520d</id>
<content type='text'>
Add the memory client and stream ID definitions for the MGBE hardware
found on Tegra234 SoCs.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Bhadram Varka &lt;vbhadram@nvidia.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: Add headers for Tegra234 GPCDMA</title>
<updated>2022-06-08T13:50:24Z</updated>
<author>
<name>Akhil R</name>
<email>akhilrajeev@nvidia.com</email>
</author>
<published>2022-05-17T07:40:47Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3ffb20f5c7891ab5bc61cb4044465d3ad1aebf49'/>
<id>urn:sha1:3ffb20f5c7891ab5bc61cb4044465d3ad1aebf49</id>
<content type='text'>
Add reset and IOMMU header for Tegra234 GPCDMA

Signed-off-by: Akhil R &lt;akhilrajeev@nvidia.com&gt;
Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mediatek: mt8186: Add binding for MM iommu</title>
<updated>2022-05-04T08:39:38Z</updated>
<author>
<name>Yong Wu</name>
<email>yong.wu@mediatek.com</email>
</author>
<published>2022-05-03T07:13:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2d555a3844142b9e0f876925a8475cc830cd472a'/>
<id>urn:sha1:2d555a3844142b9e0f876925a8475cc830cd472a</id>
<content type='text'>
Add mt8186 iommu binding. "-mm" means the iommu is for Multimedia.

Signed-off-by: Yong Wu &lt;yong.wu@mediatek.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Link: https://lore.kernel.org/r/20220503071427.2285-4-yong.wu@mediatek.com
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mediatek: mt8195: Add binding for infra IOMMU</title>
<updated>2022-05-04T08:39:38Z</updated>
<author>
<name>Yong Wu</name>
<email>yong.wu@mediatek.com</email>
</author>
<published>2022-05-03T07:13:53Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=dc1d99342db705efbeec517f9c6187f3b93ab423'/>
<id>urn:sha1:dc1d99342db705efbeec517f9c6187f3b93ab423</id>
<content type='text'>
In mt8195, we have a new IOMMU that is for INFRA IOMMU. its masters
mainly are PCIe and USB. Different with MM IOMMU, all these masters
connect with IOMMU directly, there is no mediatek,larbs property for
infra IOMMU.

Another thing is about PCIe ports. currently the function
"of_iommu_configure_dev_id" only support the id number is 1, But our
PCIe have two ports, one is for reading and the other is for writing.
see more about the PCIe patch in this patchset. Thus, I only list
the reading id here and add the other id in our driver.

Signed-off-by: Yong Wu &lt;yong.wu@mediatek.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Link: https://lore.kernel.org/r/20220503071427.2285-3-yong.wu@mediatek.com
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mediatek: mt8195: Add binding for MM IOMMU</title>
<updated>2022-05-04T08:39:38Z</updated>
<author>
<name>Yong Wu</name>
<email>yong.wu@mediatek.com</email>
</author>
<published>2022-05-03T07:13:52Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6625ffb90f44efc28a3fe1432191a4eacb08c915'/>
<id>urn:sha1:6625ffb90f44efc28a3fe1432191a4eacb08c915</id>
<content type='text'>
This patch adds descriptions for mt8195 IOMMU which also use ARM
Short-Descriptor translation table format.

In mt8195, there are two smi-common HW and IOMMU, one is for vdo(video
output), the other is for vpp(video processing pipe). They connects
with different smi-larbs, then some setting(larbid_remap) is different.
Differentiate them with the compatible string.

Something like this:

    IOMMU(VDO)          IOMMU(VPP)
       |                   |
  SMI_COMMON_VDO      SMI_COMMON_VPP
  ---------------     ----------------
  |      |   ...      |      |     ...
larb0 larb2  ...    larb1 larb3    ...

Another change is that we have a new IOMMU that is for infra master like
PCIe and USB. The infra master don't have the larb and ports, thus we
rename the port header file to mt8195-memory-port.h rather than
mt8195-larb-port.h.

Also, the IOMMU is not only for MM, thus, we don't call it "m4u" which
means "MultiMedia Memory Management UNIT". thus, use the "iommu" as the
compatiable string.

Signed-off-by: Yong Wu &lt;yong.wu@mediatek.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Link: https://lore.kernel.org/r/20220503071427.2285-2-yong.wu@mediatek.com
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>dt-bindings: memory: Add Tegra234 PCIe memory</title>
<updated>2022-02-24T19:00:25Z</updated>
<author>
<name>Vidya Sagar</name>
<email>vidyas@nvidia.com</email>
</author>
<published>2022-02-05T16:21:37Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a4ad66da3fccebdcbd53d55c035d5851b73f8bcb'/>
<id>urn:sha1:a4ad66da3fccebdcbd53d55c035d5851b73f8bcb</id>
<content type='text'>
Add the memory client and stream ID definitions for the PCIe hardware
found on Tegra234 SoCs.

Signed-off-by: Vidya Sagar &lt;vidyas@nvidia.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: Add HDA support for Tegra234</title>
<updated>2022-02-24T17:34:33Z</updated>
<author>
<name>Mohan Kumar</name>
<email>mkumard@nvidia.com</email>
</author>
<published>2022-02-16T09:22:38Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=07d743902a1205d54d93c0637c22575811014431'/>
<id>urn:sha1:07d743902a1205d54d93c0637c22575811014431</id>
<content type='text'>
Add hda clocks, memory ,power and reset binding entries
for Tegra234.

Signed-off-by: Mohan Kumar &lt;mkumard@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: Add Tegra234 APE support</title>
<updated>2022-02-17T14:21:43Z</updated>
<author>
<name>Sameer Pujar</name>
<email>spujar@nvidia.com</email>
</author>
<published>2022-01-27T07:27:32Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=40efe139ff605d80cc829ddf8c50c71d20399bf8'/>
<id>urn:sha1:40efe139ff605d80cc829ddf8c50c71d20399bf8</id>
<content type='text'>
Add clocks, power-domain and memory bindings to support APE subsystem
on Tegra234.

Signed-off-by: Sameer Pujar &lt;spujar@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: memory: tegra: Add Tegra234 support</title>
<updated>2021-12-16T15:43:49Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2021-12-13T16:21:47Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c3859c1436e31461f27365ec6fc751c9bbeff3e2'/>
<id>urn:sha1:c3859c1436e31461f27365ec6fc751c9bbeff3e2</id>
<content type='text'>
Document the variant of the memory controller and external memory
controllers found on Tegra234 and add some memory client and SMMU
stream ID definitions for use in device tree files.

Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
</feed>
