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<title>linux/include/kvm/arm_arch_timer.h, branch v5.8</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.8</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.8'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2019-06-05T15:37:06Z</updated>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 333</title>
<updated>2019-06-05T15:37:06Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-29T23:57:47Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4505153954fdb1465d2b178288a9bf646f2a2166'/>
<id>urn:sha1:4505153954fdb1465d2b178288a9bf646f2a2166</id>
<content type='text'>
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation this program is
  distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not write to the free
  software foundation inc 59 temple place suite 330 boston ma 02111
  1307 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 136 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Alexios Zavras &lt;alexios.zavras@intel.com&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190530000436.384967451@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: Rework the timer code to use a timer_map</title>
<updated>2019-02-19T21:05:43Z</updated>
<author>
<name>Christoffer Dall</name>
<email>christoffer.dall@arm.com</email>
</author>
<published>2019-01-04T12:31:22Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bee038a67487598ebbe995f85bf60c3a5b2e9099'/>
<id>urn:sha1:bee038a67487598ebbe995f85bf60c3a5b2e9099</id>
<content type='text'>
We are currently emulating two timers in two different ways.  When we
add support for nested virtualization in the future, we are going to be
emulating either two timers in two diffferent ways, or four timers in a
single way.

We need a unified data structure to keep track of how we map virtual
state to physical state and we need to cleanup some of the timer code to
operate more independently on a struct arch_timer_context instead of
trying to consider the global state of the VCPU and recomputing all
state.

Co-written with Marc Zyngier &lt;marc.zyngier@arm.com&gt;

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@arm.com&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: arch_timer: Assign the phys timer on VHE systems</title>
<updated>2019-02-19T21:05:42Z</updated>
<author>
<name>Christoffer Dall</name>
<email>christoffer.dall@arm.com</email>
</author>
<published>2019-02-19T13:04:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9e01dc76be6a3b5768cb02130d2ff0055a68809a'/>
<id>urn:sha1:9e01dc76be6a3b5768cb02130d2ff0055a68809a</id>
<content type='text'>
VHE systems don't have to emulate the physical timer, we can simply
assign the EL1 physical timer directly to the VM as the host always
uses the EL2 timers.

In order to minimize the amount of cruft, AArch32 gets definitions for
the physical timer too, but is should be generally unused on this
architecture.

Co-written with Marc Zyngier &lt;marc.zyngier@arm.com&gt;

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@arm.com&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: timer: Rework data structures for multiple timers</title>
<updated>2019-02-19T21:05:41Z</updated>
<author>
<name>Christoffer Dall</name>
<email>christoffer.dall@arm.com</email>
</author>
<published>2018-09-18T17:08:18Z</published>
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<id>urn:sha1:e604dd5d45c75c2112424dec74853efb708f4fa6</id>
<content type='text'>
Prepare for having 4 timer data structures (2 for now).

Move loaded to the cpu data structure and not the individual timer
structure, in preparation for assigning the EL1 phys timer as well.

Signed-off-by: Christoffer Dall &lt;christoffer.dall@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: consolidate arch timer trap handlers</title>
<updated>2019-02-19T21:05:40Z</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2018-07-05T15:48:23Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=84135d3d18da2ff17d3ad1a609b2818cc3049552'/>
<id>urn:sha1:84135d3d18da2ff17d3ad1a609b2818cc3049552</id>
<content type='text'>
At the moment we have separate system register emulation handlers for
each timer register. Actually they are quite similar, and we rely on
kvm_arm_timer_[gs]et_reg() for the actual emulation anyways, so let's
just merge all of those handlers into one function, which just marshalls
the arguments and then hands off to a set of common accessors.
This makes extending the emulation to include EL2 timers much easier.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
[Fixed 32-bit VM breakage and reduced to reworking existing code]
Signed-off-by: Christoffer Dall &lt;christoffer.dall@arm.com&gt;
[Fixed 32bit host, general cleanup]
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: Simplify bg_timer programming</title>
<updated>2019-02-19T21:05:36Z</updated>
<author>
<name>Christoffer Dall</name>
<email>christoffer.dall@arm.com</email>
</author>
<published>2018-11-26T17:21:22Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=accb99bcd0ca6d3ee412557b0c3f583a3abc0eb6'/>
<id>urn:sha1:accb99bcd0ca6d3ee412557b0c3f583a3abc0eb6</id>
<content type='text'>
Instead of calling into kvm_timer_[un]schedule from the main kvm
blocking path, test if the VCPU is on the wait queue from the load/put
path and perform the background timer setup/cancel in this path.

This has the distinct advantage that we no longer race between load/put
and schedule/unschedule and programming and canceling of the bg_timer
always happens when the timer state is not loaded.

Note that we must now remove the checks in kvm_timer_blocking that do
not schedule a background timer if one of the timers can fire, because
we no longer have a guarantee that kvm_vcpu_check_block() will be called
before kvm_timer_blocking.

Reported-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: Remove arch timer workqueue</title>
<updated>2018-12-19T17:47:07Z</updated>
<author>
<name>Christoffer Dall</name>
<email>christoffer.dall@arm.com</email>
</author>
<published>2018-11-27T12:48:08Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=8a411b060f820140e9894239fde5819bb213bef0'/>
<id>urn:sha1:8a411b060f820140e9894239fde5819bb213bef0</id>
<content type='text'>
The use of a work queue in the hrtimer expire function for the bg_timer
is a leftover from the time when we would inject interrupts when the
bg_timer expired.

Since we are no longer doing that, we can instead call
kvm_vcpu_wake_up() directly from the hrtimer function and remove all
workqueue functionality from the arch timer code.

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'x86/hyperv' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2018-02-01T14:04:17Z</updated>
<author>
<name>Radim Krčmář</name>
<email>rkrcmar@redhat.com</email>
</author>
<published>2018-02-01T14:04:17Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7bf14c28ee776be567855bd39ed8ff795ea19f55'/>
<id>urn:sha1:7bf14c28ee776be567855bd39ed8ff795ea19f55</id>
<content type='text'>
Topic branch for stable KVM clockource under Hyper-V.

Thanks to Christoffer Dall for resolving the ARM conflict.
</content>
</entry>
<entry>
<title>KVM: arm/arm64: Provide a get_input_level for the arch timer</title>
<updated>2018-01-02T09:05:46Z</updated>
<author>
<name>Christoffer Dall</name>
<email>christoffer.dall@linaro.org</email>
</author>
<published>2017-10-27T17:34:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4c60e360d6dfa4d9c3586b687f348eeb3fd675dd'/>
<id>urn:sha1:4c60e360d6dfa4d9c3586b687f348eeb3fd675dd</id>
<content type='text'>
The VGIC can now support the life-cycle of mapped level-triggered
interrupts, and we no longer have to read back the timer state on every
exit from the VM if we had an asserted timer interrupt signal, because
the VGIC already knows if we hit the unlikely case where the guest
disables the timer without ACKing the virtual timer interrupt.

This means we rework a bit of the code to factor out the functionality
to snapshot the timer state from vtimer_save_state(), and we can reuse
this functionality in the sync path when we have an irqchip in
userspace, and also to support our implementation of the
get_input_level() function for the timer.

This change also means that we can no longer rely on the timer's view of
the interrupt line to set the active state, because we no longer
maintain this state for mapped interrupts when exiting from the guest.
Instead, we only set the active state if the virtual interrupt is
active, and otherwise we simply let the timer fire again and raise the
virtual interrupt from the ISR.

Reviewed-by: Eric Auger &lt;eric.auger@redhat.com&gt;
Reviewed-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: timer: Don't set irq as forwarded if no usable GIC</title>
<updated>2017-12-18T09:53:23Z</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2017-12-07T11:46:15Z</published>
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<id>urn:sha1:f384dcfe4d918c1d80477d290c22ce0093823771</id>
<content type='text'>
If we don't have a usable GIC, do not try to set the vcpu affinity
as this is guaranteed to fail.

Reported-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reviewed-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Tested-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reviewed-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
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