<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/include/kvm, branch v4.15</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.15</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.15'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2017-12-18T09:53:23Z</updated>
<entry>
<title>KVM: arm/arm64: timer: Don't set irq as forwarded if no usable GIC</title>
<updated>2017-12-18T09:53:23Z</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2017-12-07T11:46:15Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f384dcfe4d918c1d80477d290c22ce0093823771'/>
<id>urn:sha1:f384dcfe4d918c1d80477d290c22ce0093823771</id>
<content type='text'>
If we don't have a usable GIC, do not try to set the vcpu affinity
as this is guaranteed to fail.

Reported-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reviewed-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Tested-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reviewed-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: Don't enable/disable physical timer access on VHE</title>
<updated>2017-11-29T15:46:09Z</updated>
<author>
<name>Christoffer Dall</name>
<email>christoffer.dall@linaro.org</email>
</author>
<published>2017-11-20T11:10:15Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ec6449a9c2296b1c04f6219f7473e0c2fedecfed'/>
<id>urn:sha1:ec6449a9c2296b1c04f6219f7473e0c2fedecfed</id>
<content type='text'>
After the timer optimization rework we accidentally end up calling
physical timer enable/disable functions on VHE systems, which is neither
needed nor correct, since the CNTHCTL_EL2 register format is
different when HCR_EL2.E2H is set.

The CNTHCTL_EL2 is initialized when CPUs become online in
kvm_timer_init_vhe() and we don't have to call these functions on VHE
systems, which also allows us to inline the non-VHE functionality.

Reported-by: Jintack Lim &lt;jintack@cs.columbia.edu&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: GICv4: Use the doorbell interrupt as an unblocking source</title>
<updated>2017-11-10T08:43:22Z</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2017-10-27T14:28:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=df9ba95993b9d59e077aa4613f7a4edd20a4064c'/>
<id>urn:sha1:df9ba95993b9d59e077aa4613f7a4edd20a4064c</id>
<content type='text'>
The doorbell interrupt is only useful if the vcpu is blocked on WFI.
In all other cases, recieving a doorbell interrupt is just a waste
of cycles.

So let's only enable the doorbell if a vcpu is getting blocked,
and disable it when it is unblocked. This is very similar to
what we're doing for the background timer.

Reviewed-by: Christoffer Dall &lt;cdall@linaro.org&gt;
Reviewed-by: Eric Auger &lt;eric.auger@redhat.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: GICv4: Wire mapping/unmapping of VLPIs in VFIO irq bypass</title>
<updated>2017-11-10T08:28:52Z</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2017-10-27T14:28:39Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=196b136498b35f1cd787b84465f235e69dbc757c'/>
<id>urn:sha1:196b136498b35f1cd787b84465f235e69dbc757c</id>
<content type='text'>
Let's use the irq bypass mechanism also used for x86 posted interrupts
to intercept the virtual PCIe endpoint configuration and establish our
LPI-&gt;VLPI mapping.

Reviewed-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: GICv4: Add init/teardown of the per-VM vPE irq domain</title>
<updated>2017-11-10T08:06:56Z</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2017-10-27T14:28:38Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=74fe55dc9ab77142e3c4783ecc5b87d494164452'/>
<id>urn:sha1:74fe55dc9ab77142e3c4783ecc5b87d494164452</id>
<content type='text'>
In order to control the GICv4 view of virtual CPUs, we rely
on an irqdomain allocated for that purpose. Let's add a couple
of helpers to that effect.

At the same time, the vgic data structures gain new fields to
track all this... erm... wonderful stuff.

The way we hook into the vgic init is slightly convoluted. We
need the vgic to be initialized (in order to guarantee that
the number of vcpus is now fixed), and we must have a vITS
(otherwise this is all very pointless). So we end-up calling
the init from both vgic_init and vgic_its_create.

Reviewed-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: GICv4: Add property field and per-VM predicate</title>
<updated>2017-11-10T08:06:45Z</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2017-10-27T14:28:37Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e7c48059248e013772d8da69351ac8b262d8fce2'/>
<id>urn:sha1:e7c48059248e013772d8da69351ac8b262d8fce2</id>
<content type='text'>
Add a new has_gicv4 field in the global VGIC state that indicates
whether the HW is GICv4 capable, as a per-VM predicate indicating
if there is a possibility for a VM to support direct injection
(the above being true and the VM having an ITS).

Reviewed-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Reviewed-by: Eric Auger &lt;eric.auger@redhat.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: vgic: restructure kvm_vgic_(un)map_phys_irq</title>
<updated>2017-11-06T16:20:19Z</updated>
<author>
<name>Eric Auger</name>
<email>eric.auger@redhat.com</email>
</author>
<published>2017-10-27T14:28:32Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=47bbd31f740c4e693d01766f367ad3366fb49a6d'/>
<id>urn:sha1:47bbd31f740c4e693d01766f367ad3366fb49a6d</id>
<content type='text'>
We want to reuse the core of the map/unmap functions for IRQ
forwarding. Let's move the computation of the hwirq in
kvm_vgic_map_phys_irq and pass the linux IRQ as parameter.
the host_irq is added to struct vgic_irq.

We introduce kvm_vgic_map/unmap_irq which take a struct vgic_irq
handle as a parameter.

Acked-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Eric Auger &lt;eric.auger@redhat.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: Rework kvm_timer_should_fire</title>
<updated>2017-11-06T15:23:17Z</updated>
<author>
<name>Christoffer Dall</name>
<email>cdall@linaro.org</email>
</author>
<published>2017-01-06T15:07:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1c88ab7ec8c53c4d806bb2b6871ddafdebbffa8b'/>
<id>urn:sha1:1c88ab7ec8c53c4d806bb2b6871ddafdebbffa8b</id>
<content type='text'>
kvm_timer_should_fire() can be called in two different situations from
the kvm_vcpu_block().

The first case is before calling kvm_timer_schedule(), used for wait
polling, and in this case the VCPU thread is running and the timer state
is loaded onto the hardware so all we have to do is check if the virtual
interrupt lines are asserted, becasue the timer interrupt handler
functions will raise those lines as appropriate.

The second case is inside the wait loop of kvm_vcpu_block(), where we
have already called kvm_timer_schedule() and therefore the hardware will
be disabled and the software view of the timer state is up to date
(timer-&gt;loaded is false), and so we can simply check if the timer should
fire by looking at the software state.

Signed-off-by: Christoffer Dall &lt;cdall@linaro.org&gt;
Reviewed-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: Get rid of kvm_timer_flush_hwstate</title>
<updated>2017-11-06T15:23:16Z</updated>
<author>
<name>Christoffer Dall</name>
<email>cdall@linaro.org</email>
</author>
<published>2017-06-20T14:56:20Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7e90c8e5704cbb299d48e7debb1e61614cb12f41'/>
<id>urn:sha1:7e90c8e5704cbb299d48e7debb1e61614cb12f41</id>
<content type='text'>
Now when both the vtimer and the ptimer when using both the in-kernel
vgic emulation and a userspace IRQ chip are driven by the timer signals
and at the vcpu load/put boundaries, instead of recomputing the timer
state at every entry/exit to/from the guest, we can get entirely rid of
the flush hwstate function.

Signed-off-by: Christoffer Dall &lt;cdall@linaro.org&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: Avoid timer save/restore in vcpu entry/exit</title>
<updated>2017-11-06T15:23:14Z</updated>
<author>
<name>Christoffer Dall</name>
<email>cdall@linaro.org</email>
</author>
<published>2016-10-16T18:30:38Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b103cc3f10c06fb81faacd4ee6f88bbd21246073'/>
<id>urn:sha1:b103cc3f10c06fb81faacd4ee6f88bbd21246073</id>
<content type='text'>
We don't need to save and restore the hardware timer state and examine
if it generates interrupts on on every entry/exit to the guest.  The
timer hardware is perfectly capable of telling us when it has expired
by signaling interrupts.

When taking a vtimer interrupt in the host, we don't want to mess with
the timer configuration, we just want to forward the physical interrupt
to the guest as a virtual interrupt.  We can use the split priority drop
and deactivate feature of the GIC to do this, which leaves an EOI'ed
interrupt active on the physical distributor, making sure we don't keep
taking timer interrupts which would prevent the guest from running.  We
can then forward the physical interrupt to the VM using the HW bit in
the LR of the GIC, like we do already, which lets the guest directly
deactivate both the physical and virtual timer simultaneously, allowing
the timer hardware to exit the VM and generate a new physical interrupt
when the timer output is again asserted later on.

We do need to capture this state when migrating VCPUs between physical
CPUs, however, which we use the vcpu put/load functions for, which are
called through preempt notifiers whenever the thread is scheduled away
from the CPU or called directly if we return from the ioctl to
userspace.

One caveat is that we have to save and restore the timer state in both
kvm_timer_vcpu_[put/load] and kvm_timer_[schedule/unschedule], because
we can have the following flows:

  1. kvm_vcpu_block
  2. kvm_timer_schedule
  3. schedule
  4. kvm_timer_vcpu_put (preempt notifier)
  5. schedule (vcpu thread gets scheduled back)
  6. kvm_timer_vcpu_load (preempt notifier)
  7. kvm_timer_unschedule

And a version where we don't actually call schedule:

  1. kvm_vcpu_block
  2. kvm_timer_schedule
  7. kvm_timer_unschedule

Since kvm_timer_[schedule/unschedule] may not be followed by put/load,
but put/load also may be called independently, we call the timer
save/restore functions from both paths.  Since they rely on the loaded
flag to never save/restore when unnecessary, this doesn't cause any
harm, and we ensure that all invokations of either set of functions work
as intended.

An added benefit beyond not having to read and write the timer sysregs
on every entry and exit is that we no longer have to actively write the
active state to the physical distributor, because we configured the
irq for the vtimer to only get a priority drop when handling the
interrupt in the GIC driver (we called irq_set_vcpu_affinity()), and
the interrupt stays active after firing on the host.

Reviewed-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;cdall@linaro.org&gt;
</content>
</entry>
</feed>
