<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/include/soc/mscc, branch v5.8</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.8</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.8'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2020-05-07T05:10:13Z</updated>
<entry>
<title>Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net</title>
<updated>2020-05-07T05:10:13Z</updated>
<author>
<name>David S. Miller</name>
<email>davem@davemloft.net</email>
</author>
<published>2020-05-07T05:10:13Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3793faad7b5b730941b2efbc252d14374b60843a'/>
<id>urn:sha1:3793faad7b5b730941b2efbc252d14374b60843a</id>
<content type='text'>
Conflicts were all overlapping changes.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: dsa: ocelot: the MAC table on Felix is twice as large</title>
<updated>2020-05-07T00:15:24Z</updated>
<author>
<name>Vladimir Oltean</name>
<email>vladimir.oltean@nxp.com</email>
</author>
<published>2020-05-03T22:20:26Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=21ce7f3e16fbf89faaf149cfe0f730edfc553914'/>
<id>urn:sha1:21ce7f3e16fbf89faaf149cfe0f730edfc553914</id>
<content type='text'>
When running 'bridge fdb dump' on Felix, sometimes learnt and static MAC
addresses would appear, sometimes they wouldn't.

Turns out, the MAC table has 4096 entries on VSC7514 (Ocelot) and 8192
entries on VSC9959 (Felix), so the existing code from the Ocelot common
library only dumped half of Felix's MAC table. They are both organized
as a 4-way set-associative TCAM, so we just need a single variable
indicating the correct number of rows.

Fixes: 56051948773e ("net: dsa: ocelot: add driver for Felix switch family")
Signed-off-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: mscc: ocelot: support 4 PTP programmable pins</title>
<updated>2020-04-21T22:38:33Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@nxp.com</email>
</author>
<published>2020-04-20T02:46:49Z</published>
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<id>urn:sha1:cc2d87bb83407c7dfb0900d63b3fcfbf6a59202f</id>
<content type='text'>
Support 4 PTP programmable pins with only PTP_PF_PEROUT function
for now. The PTP_PF_EXTTS function will be supported in the
future, and it should be implemented separately for Felix and
Ocelot, because of different hardware interrupt implementation
in them.

Since the hardware is not able to support absolute start time,
the periodic clock request only allows start time 0 0. But nsec
could be accepted for PPS case for phase adjustment.

Signed-off-by: Yangbo Lu &lt;yangbo.lu@nxp.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: mscc: ocelot: add wave programming registers definitions</title>
<updated>2020-04-21T22:38:33Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@nxp.com</email>
</author>
<published>2020-04-20T02:46:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=94aca0824443d32987b31e656044ff7da425c523'/>
<id>urn:sha1:94aca0824443d32987b31e656044ff7da425c523</id>
<content type='text'>
Add wave programming registers definitions for Ocelot platforms.

Signed-off-by: Yangbo Lu &lt;yangbo.lu@nxp.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: mscc: ocelot: redefine PTP pins</title>
<updated>2020-04-21T22:38:33Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@nxp.com</email>
</author>
<published>2020-04-20T02:46:47Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3007bc7321e3c37de9d7d965cb9fb95aaa00113b'/>
<id>urn:sha1:3007bc7321e3c37de9d7d965cb9fb95aaa00113b</id>
<content type='text'>
There are 5 PTP_PINS register groups on Ocelot switch.
Except the one used for TOD operations, there are still
4 register groups for programmable pins. So redefine the
4 programmable pins.

Signed-off-by: Yangbo Lu &lt;yangbo.lu@nxp.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: mscc: ocelot: move ocelot ptp clock code out of ocelot.c</title>
<updated>2020-04-21T22:38:33Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@nxp.com</email>
</author>
<published>2020-04-20T02:46:45Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2b49d128b3f8d8fff8972afcbc603802e5e40c6a'/>
<id>urn:sha1:2b49d128b3f8d8fff8972afcbc603802e5e40c6a</id>
<content type='text'>
The Ocelot PTP clock driver had been embedded into ocelot.c driver.
It had supported basic gettime64/settime64/adjtime/adjfine functions
by now which were used by both Ocelot switch and Felix switch.

This patch is to move current ptp clock code out of ocelot.c driver
maintaining as a single ocelot_ptp.c.
For futher new features implementation, the common code could be put
in ocelot_ptp.c and the switch specific code should be in specific
switch driver. The interrupt implementation in SoC is different
between Ocelot and Felix.

Signed-off-by: Yangbo Lu &lt;yangbo.lu@nxp.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: mscc: ocelot: fix untagged packet drops when enslaving to vlan aware bridge</title>
<updated>2020-04-15T19:27:35Z</updated>
<author>
<name>Vladimir Oltean</name>
<email>vladimir.oltean@nxp.com</email>
</author>
<published>2020-04-14T19:36:15Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=87b0f983f66f23762921129fd35966eddc3f2dae'/>
<id>urn:sha1:87b0f983f66f23762921129fd35966eddc3f2dae</id>
<content type='text'>
To rehash a previous explanation given in commit 1c44ce560b4d ("net:
mscc: ocelot: fix vlan_filtering when enslaving to bridge before link is
up"), the switch driver operates the in a mode where a single VLAN can
be transmitted as untagged on a particular egress port. That is the
"native VLAN on trunk port" use case.

The configuration for this native VLAN is driven in 2 ways:
 - Set the egress port rewriter to strip the VLAN tag for the native
   VID (as it is egress-untagged, after all).
 - Configure the ingress port to drop untagged and priority-tagged
   traffic, if there is no native VLAN. The intention of this setting is
   that a trunk port with no native VLAN should not accept untagged
   traffic.

Since both of the above configurations for the native VLAN should only
be done if VLAN awareness is requested, they are actually done from the
ocelot_port_vlan_filtering function, after the basic procedure of
toggling the VLAN awareness flag of the port.

But there's a problem with that simplistic approach: we are trying to
juggle with 2 independent variables from a single function:
 - Native VLAN of the port - its value is held in port-&gt;vid.
 - VLAN awareness state of the port - currently there are some issues
   here, more on that later*.
The actual problem can be seen when enslaving the switch ports to a VLAN
filtering bridge:
 0. The driver configures a pvid of zero for each port, when in
    standalone mode. While the bridge configures a default_pvid of 1 for
    each port that gets added as a slave to it.
 1. The bridge calls ocelot_port_vlan_filtering with vlan_aware=true.
    The VLAN-filtering-dependent portion of the native VLAN
    configuration is done, considering that the native VLAN is 0.
 2. The bridge calls ocelot_vlan_add with vid=1, pvid=true,
    untagged=true. The native VLAN changes to 1 (change which gets
    propagated to hardware).
 3. ??? - nobody calls ocelot_port_vlan_filtering again, to reapply the
    VLAN-filtering-dependent portion of the native VLAN configuration,
    for the new native VLAN of 1. One can notice that after toggling "ip
    link set dev br0 type bridge vlan_filtering 0 &amp;&amp; ip link set dev br0
    type bridge vlan_filtering 1", the new native VLAN finally makes it
    through and untagged traffic finally starts flowing again. But
    obviously that shouldn't be needed.

So it is clear that 2 independent variables need to both re-trigger the
native VLAN configuration. So we introduce the second variable as
ocelot_port-&gt;vlan_aware.

*Actually both the DSA Felix driver and the Ocelot driver already had
each its own variable:
 - Ocelot: ocelot_port_private-&gt;vlan_aware
 - Felix: dsa_port-&gt;vlan_filtering
but the common Ocelot library needs to work with a single, common,
variable, so there is some refactoring done to move the vlan_aware
property from the private structure into the common ocelot_port
structure.

Fixes: 97bb69e1e36e ("net: mscc: ocelot: break apart ocelot_vlan_port_apply")
Signed-off-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
Reviewed-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: dsa: felix: add port policers</title>
<updated>2020-03-30T18:44:00Z</updated>
<author>
<name>Vladimir Oltean</name>
<email>vladimir.oltean@nxp.com</email>
</author>
<published>2020-03-29T11:52:00Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=fc411eaac8db7bd2cf3d9b67fd4b5651345a2cef'/>
<id>urn:sha1:fc411eaac8db7bd2cf3d9b67fd4b5651345a2cef</id>
<content type='text'>
This patch is a trivial passthrough towards the ocelot library, which
support port policers since commit 2c1d029a017f ("net: mscc: ocelot:
Implement port policers via tc command").

Some data structure conversion between the DSA core and the Ocelot
library is necessary, for policer parameters.

Signed-off-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: mscc: ocelot: add action of police on vcap_is2</title>
<updated>2020-03-30T18:44:00Z</updated>
<author>
<name>Xiaoliang Yang</name>
<email>xiaoliang.yang_1@nxp.com</email>
</author>
<published>2020-03-29T11:51:57Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c9a7fe1238e5fb3d26cb541a12083f2e1f3b2356'/>
<id>urn:sha1:c9a7fe1238e5fb3d26cb541a12083f2e1f3b2356</id>
<content type='text'>
Ocelot has 384 policers that can be allocated to ingress ports,
QoS classes per port, and VCAP IS2 entries. ocelot_police.c
supports to set policers which can be allocated to police action
of VCAP IS2. We allocate policers from maximum pol_id, and
decrease the pol_id when add a new vcap_is2 entry which is
police action.

Signed-off-by: Xiaoliang Yang &lt;xiaoliang.yang_1@nxp.com&gt;
Signed-off-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: dsa: felix: support changing the MTU</title>
<updated>2020-03-27T23:07:25Z</updated>
<author>
<name>Vladimir Oltean</name>
<email>vladimir.oltean@nxp.com</email>
</author>
<published>2020-03-27T19:55:47Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0b912fc93a680ab6105a63c36222923fbe09065e'/>
<id>urn:sha1:0b912fc93a680ab6105a63c36222923fbe09065e</id>
<content type='text'>
Changing the MTU for this switch means altering the
DEV_GMII:MAC_CFG_STATUS:MAC_MAXLEN_CFG field MAX_LEN, which in turn
limits the size of frames that can be received.

Special accounting needs to be done for the DSA CPU port (NPI port in
hardware terms). The NPI port configuration needs to be held inside the
private ocelot structure, since it is now accessed from multiple places.

Signed-off-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
</feed>
