linux/include/soc/tegra, branch v4.14

soc/tegra: Register SoC device

2017-08-17T14:43:13Z

Move this code from arch/arm/mach-tegra and make it common among 32-bit and 64-bit Tegra SoCs. This is slightly complicated by the fact that on 32-bit Tegra, the SoC device is used as the parent for all devices that are instantiated from device tree. Signed-off-by: Thierry Reding

soc/tegra: bpmp: Implement generic PM domains

2017-06-13T13:23:29Z

The BPMP firmware, found on Tegra186 and later, provides an ABI that can be used to enable and disable power to several power partitions in Tegra SoCs. The ABI allows for enumeration of the available power partitions, so the driver can be reused on future generations, provided the BPMP ABI remains stable. Based on work by Stefan Kristiansson and Mikko Perttunen . Signed-off-by: Thierry Reding Reviewed-by: Ulf Hansson Signed-off-by: Thierry Reding

soc/tegra: bpmp: Update ABI header

2017-06-13T13:16:25Z

Update the BPMP ABI header to a more recent version. The new version adds support for a new powergating ABI as well as access to the ring buffer console, which allows debug messages to be output to the BPMP debug console. Some of the previously undocumented fields have been documented and missing bitmasks have been added. Furthermore the MRQ_RESET request now has a sub-command that allows to determine the maximum ID which in turn allows the resets to be enumerated, thereby allowing drivers to become agnostic of the Tegra generation. Signed-off-by: Thierry Reding

soc/tegra: Move Tegra flowctrl driver

2017-04-04T13:48:04Z

The flowctrl driver is required for both ARM and ARM64 Tegra devices and in order to enable support for it for ARM64, move the Tegra flowctrl driver into drivers/soc/tegra. By moving the flowctrl driver, tegra_flowctrl_init() is now called by via an early initcall and to prevent this function from attempting to mapping IO space for a non-Tegra device, a test for 'soc_is_tegra()' is also added. Signed-off-by: Jon Hunter Signed-off-by: Thierry Reding

soc/tegra: Fix link errors with PMC disabled

2017-04-04T13:43:51Z

With the new Tegra186 PMC driver merged, anything that relies on the previous PMC driver fails to link when that is disabled: arch/arm/mach-tegra/pm.o: In function `tegra_pm_set': pm.c:(.text.tegra_pm_set+0x3c): undefined reference to `tegra_pmc_enter_suspend_mode' arch/arm/mach-tegra/pm.o: In function `tegra_suspend_enter': pm.c:(.text.tegra_suspend_enter+0x4): undefined reference to `tegra_pmc_get_suspend_mode' arch/arm/mach-tegra/pm.o: In function `tegra_init_suspend': pm.c:(.init.text+0x1c): undefined reference to `tegra_pmc_get_suspend_mode' pm.c:(.init.text+0x74): undefined reference to `tegra_pmc_set_suspend_mode' ERROR: tegra_powergate_sequence_power_up [drivers/ata/ahci_tegra.ko] undefined! ERROR: tegra_powergate_power_off [drivers/ata/ahci_tegra.ko] undefined! Making the definition depend on the presence of the driver makes it build again, though that might not be the correct fix. Reported-by: Krzysztof Kozlowski Fixes: 854014236290 ("soc/tegra: Implement Tegra186 PMC support") Signed-off-by: Arnd Bergmann Signed-off-by: Thierry Reding

Merge tag 'tegra-for-4.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

2016-11-19T02:42:33Z

soc: tegra: Core SoC changes for v4.10-rc1 This contains mostly cleanup and new feature work on the power management controller as well as the addition of a Kconfig symbol for the new Tegra186 (Parker) SoC generation. * tag 'tegra-for-4.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: pmc: Use consistent naming for PM domains soc/tegra: pmc: Remove genpd when adding provider fails soc/tegra: pmc: Check return code for pm_genpd_init() soc/tegra: pmc: Clean-up I/O rail error messages soc/tegra: pmc: Simplify IO rail bit handling soc/tegra: pmc: Guard against uninitialised PMC clock soc/tegra: pmc: Add I/O pad voltage support soc/tegra: pmc: Use consistent ordering of bit definitions soc/tegra: pmc: Correct type of variable for tegra_pmc_readl() soc/tegra: pmc: Use BIT macro for register field definition Signed-off-by: Olof Johansson

firmware: tegra: Add BPMP support

2016-11-18T13:33:43Z

The Boot and Power Management Processor (BPMP) is a co-processor found on Tegra SoCs. It is designed to handle the early stages of the boot process and offload power management tasks (such as clocks, resets, powergates, ...) as well as system control services. Compared to the ARM SCPI, the services provided by BPMP are message- based rather than method-based. The BPMP firmware driver provides the services to transmit data to and receive data from the BPMP. Users can also register a Message ReQuest (MRQ), for which a service routine will be run when a corresponding event is received from the firmware. A set of messages, called the BPMP ABI, are specified for a number of different services provided by the BPMP (such as clocks or resets). Based on work by Sivaram Nair and Joseph Lo . Signed-off-by: Thierry Reding

firmware: tegra: Add IVC library

2016-11-18T13:33:42Z

The Inter-VM communication (IVC) is a communication protocol which is designed for interprocessor communication (IPC) or the communication between the hypervisor and the virtual machine with a guest OS. Message channels are used to communicate between processors. They are backed by DRAM or SRAM, so care must be taken to maintain coherence of data. The IVC library maintains memory-based descriptors for the transmission and reception channels as well as the data coherence of the counter and payload. Clients, such as the driver for the BPMP firmware, can use the library to exchange messages with remote processors. Based on work by Peter Newman and Joseph Lo . Signed-off-by: Thierry Reding

soc/tegra: pmc: Add I/O pad voltage support

2016-11-15T14:51:51Z

I/O pins on Tegra SoCs are grouped into so-called I/O pads. Each such pad can be used to control the common voltage signal level and power state of the pins in the given pad. I/O pads can be powered down even if the system is active, which can save power from that I/O interface. For SoC generations prior to Tegra124 the I/O pad voltage is automatically detected and hence the system software doesn't need to configure it. However, starting with Tegra210 the detection logic has been removed, so explicit control of the I/O pad voltage by system software is required. Signed-off-by: Laxman Dewangan Signed-off-by: Thierry Reding

soc/tegra: Stub out PCIe IRQ workaround on 64-bit ARM

2016-06-30T11:54:17Z

The PCIe host controller found on Tegra20 has a hardware bug that causes PCIe interrupts to get lost when LP2 is enabled. Stub out the workaround on 64-bit ARM because none of the more recent Tegra SoC generations seem to have this bug anymore. Signed-off-by: Thierry Reding