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<title>linux/include/soc/tegra, branch v5.1</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.1</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.1'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2019-03-10T19:29:52Z</updated>
<entry>
<title>Merge tag 'iommu-updates-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu</title>
<updated>2019-03-10T19:29:52Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2019-03-10T19:29:52Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bb97be23db2a296c5f8b8b4c40feb0435b068c5e'/>
<id>urn:sha1:bb97be23db2a296c5f8b8b4c40feb0435b068c5e</id>
<content type='text'>
Pull IOMMU updates from Joerg Roedel:

 - A big cleanup and optimization patch-set for the Tegra GART driver

 - Documentation updates and fixes for the IOMMU-API

 - Support for page request in Intel VT-d scalable mode

 - Intel VT-d dma_[un]map_resource() support

 - Updates to the ATS enabling code for PCI (acked by Bjorn) and Intel
   VT-d to align with the latest version of the ATS spec

 - Relaxed IRQ source checking in the Intel VT-d driver for some aliased
   devices, needed for future devices which send IRQ messages from more
   than on request-ID

 - IRQ remapping driver for Hyper-V

 - Patches to make generic IOVA and IO-Page-Table code usable outside of
   the IOMMU code

 - Various other small fixes and cleanups

* tag 'iommu-updates-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (60 commits)
  iommu/vt-d: Get domain ID before clear pasid entry
  iommu/vt-d: Fix NULL pointer reference in intel_svm_bind_mm()
  iommu/vt-d: Set context field after value initialized
  iommu/vt-d: Disable ATS support on untrusted devices
  iommu/mediatek: Fix semicolon code style issue
  MAINTAINERS: Add Hyper-V IOMMU driver into Hyper-V CORE AND DRIVERS scope
  iommu/hyper-v: Add Hyper-V stub IOMMU driver
  x86/Hyper-V: Set x2apic destination mode to physical when x2apic is available
  PCI/ATS: Add inline to pci_prg_resp_pasid_required()
  iommu/vt-d: Check identity map for hot-added devices
  iommu: Fix IOMMU debugfs fallout
  iommu: Document iommu_ops.is_attach_deferred()
  iommu: Document iommu_ops.iotlb_sync_map()
  iommu/vt-d: Enable ATS only if the device uses page aligned address.
  PCI/ATS: Add pci_ats_page_aligned() interface
  iommu/vt-d: Fix PRI/PASID dependency issue.
  PCI/ATS: Add pci_prg_resp_pasid_required() interface.
  iommu/vt-d: Allow interrupts from the entire bus for aliased devices
  iommu/vt-d: Add helper to set an IRTE to verify only the bus number
  iommu: Fix flush_tlb_all typo
  ...
</content>
</entry>
<entry>
<title>Merge tag 'tegra-for-5.1-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers</title>
<updated>2019-02-15T16:24:45Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2019-02-15T16:24:05Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a21c3f1795c151755e93f2fdf33caaa92304faea'/>
<id>urn:sha1:a21c3f1795c151755e93f2fdf33caaa92304faea</id>
<content type='text'>
soc/tegra: Changes for v5.1-rc1

This contains a couple of miscellaneous fixes for minor issues and a
largish rework of the PMC driver to make it work on systems where the
PMC has been locked down and can only be accessed from secure firmware.

* tag 'tegra-for-5.1-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: pmc: Support systems where PMC is marked secure
  soc/tegra: pmc: Explicitly initialize all fields
  soc/tegra: pmc: Make alignment consistent
  soc/tegra: pmc: Pass struct tegra_pmc * where possible
  soc/tegra: pmc: Make tegra_powergate_is_powered() a local function
  soc/tegra: pmc: Add missing kerneldoc
  soc/tegra: pmc: Sort includes alphabetically
  soc/tegra: pmc: Use TEGRA186_ prefix for GPIO names
  soc/tegra: fuse: Fix typo in tegra210_init_speedo_data
  soc/tegra: fuse: Fix illegal free of IO base address

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>firmware: tegra: add bpmp driver for Tegra210</title>
<updated>2019-01-25T14:58:47Z</updated>
<author>
<name>Timo Alho</name>
<email>talho@nvidia.com</email>
</author>
<published>2019-01-24T17:03:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=139251fc220830cc49b71331d281a8ad03a08ab7'/>
<id>urn:sha1:139251fc220830cc49b71331d281a8ad03a08ab7</id>
<content type='text'>
This patch adds driver for Tegra210 BPMP firmware.

The BPMP is a specific processor in Tegra210 chip, which runs firmware
for assisting in entering deep low power states (suspend to ram), and
offloading DRAM memory clock scaling on some platforms.

Based on work by Sivaram Nair &lt;sivaramn@nvidia.com&gt;

Signed-off-by: Timo Alho &lt;talho@nvidia.com&gt;
Acked-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>firmware: tegra: Refactor BPMP driver</title>
<updated>2019-01-25T14:58:47Z</updated>
<author>
<name>Timo Alho</name>
<email>talho@nvidia.com</email>
</author>
<published>2019-01-24T17:03:53Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cdfa358b248efd36c6a9cb4d4d0a3ba7509f8387'/>
<id>urn:sha1:cdfa358b248efd36c6a9cb4d4d0a3ba7509f8387</id>
<content type='text'>
Split BPMP driver into common and chip specific parts to facilitate
adding support for previous and future Tegra chips that are using BPMP
as co-processor.

Signed-off-by: Timo Alho &lt;talho@nvidia.com&gt;
Acked-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: pmc: Make tegra_powergate_is_powered() a local function</title>
<updated>2019-01-25T13:17:49Z</updated>
<author>
<name>Jon Hunter</name>
<email>jonathanh@nvidia.com</email>
</author>
<published>2019-01-25T10:22:51Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d32dde2c5a110f2d69add70d7a9f1c20d82d0ef1'/>
<id>urn:sha1:d32dde2c5a110f2d69add70d7a9f1c20d82d0ef1</id>
<content type='text'>
Now there are no more external users of tegra_powergate_is_powered(),
make this a local function.

Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>iommu/tegra: gart: Integrate with Memory Controller driver</title>
<updated>2019-01-16T12:54:12Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-12-12T20:38:56Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ce2785a75dbca27375f3723f4e697a2a8dc096ee'/>
<id>urn:sha1:ce2785a75dbca27375f3723f4e697a2a8dc096ee</id>
<content type='text'>
The device-tree binding has been changed. There is no separate GART device
anymore, it is squashed into the Memory Controller. Integrate GART module
with the MC in a way it is done for the SMMU on Tegra30+.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Adapt to Tegra20 device-tree binding changes</title>
<updated>2019-01-16T12:54:11Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-12-12T20:38:52Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=96efa118c03648fdc76acad9ca8fe018a6be7145'/>
<id>urn:sha1:96efa118c03648fdc76acad9ca8fe018a6be7145</id>
<content type='text'>
The tegra20-mc device-tree binding has been changed, GART has been
squashed into Memory Controller and now the clock property is mandatory
for Tegra20, the DT compatible has been changed as well. Adapt driver to
the DT changes.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2019-01-01T01:32:35Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2019-01-01T01:32:35Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d36377c6eb071e3d0751e9e0e3c19198c58d9a5d'/>
<id>urn:sha1:d36377c6eb071e3d0751e9e0e3c19198c58d9a5d</id>
<content type='text'>
Pull ARM SoC driver updates from Olof Johansson:
 "Misc driver updates for platforms, many of them power related.

   - Rockchip adds power domain support for rk3066 and rk3188

   - Amlogic adds a power measurement driver

   - Allwinner adds SRAM support for three platforms (F1C100, H5, A64
     C1)

   - Wakeup and ti-sysc (platform bus) fixes for OMAP/DRA7

   - Broadcom fixes suspend/resume with Thumb2 kernels, and improves
     stability of a handful of firmware/platform interfaces

   - PXA completes their conversion to dmaengine framework

   - Renesas does a bunch of PM cleanups across many platforms

   - Tegra adds support for suspend/resume on T186/T194, which includes
     some driver cleanups and addition of wake events

   - Tegra also adds a driver for memory controller (EMC) on Tegra2

   - i.MX tweaks power domain bindings, and adds support for i.MX8MQ in
     GPC

   - Atmel adds identifiers and LPDDR2 support for a new SoC, SAM9X60

  and misc cleanups across several platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (73 commits)
  ARM: at91: add support in soc driver for new SAM9X60
  ARM: at91: add support in soc driver for LPDDR2 SiP
  memory: omap-gpmc: Use of_node_name_eq for node name comparisons
  bus: ti-sysc: Check for no-reset and no-idle flags at the child level
  ARM: OMAP2+: Check also the first dts child for hwmod flags
  soc: amlogic: meson-clk-measure: Add missing REGMAP_MMIO dependency
  soc: imx: gpc: Increase GPC_CLK_MAX to 7
  soc: renesas: rcar-sysc: Fix power domain control after system resume
  soc: renesas: rcar-sysc: Merge PM Domain registration and linking
  soc: renesas: rcar-sysc: Remove rcar_sysc_power_{down,up}() helpers
  soc: renesas: r8a77990-sysc: Fix initialization order of 3DG-{A,B}
  dt-bindings: sram: sunxi: Add compatible for the A64 SRAM C1
  dt-bindings: sram: sunxi: Add bindings for the H5 with SRAM C1
  dt-bindings: sram: Add Allwinner suniv F1C100s
  soc: sunxi: sram: Add support for the H5 SoC system control
  soc: sunxi: sram: Enable EMAC clock access for H3 variant
  soc: imx: gpcv2: add support for i.MX8MQ SoC
  soc: imx: gpcv2: move register access table to domain data
  soc: imx: gpcv2: prefix i.MX7 specific defines
  dmaengine: pxa: make the filter function internal
  ...
</content>
</entry>
<entry>
<title>soc/tegra: pmc: Drop SMP dependency from CPU APIs</title>
<updated>2018-12-14T21:32:55Z</updated>
<author>
<name>Jon Hunter</name>
<email>jonathanh@nvidia.com</email>
</author>
<published>2018-12-13T09:46:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f9c380efa792f313d3366a935fe38091d4c98ccb'/>
<id>urn:sha1:f9c380efa792f313d3366a935fe38091d4c98ccb</id>
<content type='text'>
When CONFIG_SMP is disabled, the tegra clk driver now fails to build:

drivers/clk/tegra/clk-tegra30.c: In function ‘tegra30_cpu_rail_off_ready’:
drivers/clk/tegra/clk-tegra30.c:1151:2: error: implicit declaration of function ‘tegra_pmc_cpu_is_powered’ [-Werror=implicit-function-declaration]
  cpu_pwr_status = tegra_pmc_cpu_is_powered(1) ||
    ^
Fix the above error by removing the CONFIG_SMP ifdef around the
declaration around the PMC CPU APIs because although these are not
needed for non-SMP configurations, there is no harm in including these
for non-SMP builds either.

Fixes: 61866523ed6e ("clk: tegra30: Use Tegra CPU powergate helper function")
Reported-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'tegra-for-4.21-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers</title>
<updated>2018-12-12T21:29:26Z</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2018-12-12T21:29:26Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2d32d65741040b2908b2d948d0925d13392caf33'/>
<id>urn:sha1:2d32d65741040b2908b2d948d0925d13392caf33</id>
<content type='text'>
firmware: tegra: Changes for v4.21-rc1

These changes update the BPMP ABI header and implement a new variant of
the BPMP firmware version tag query if supported.

* tag 'tegra-for-4.21-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  firmware: tegra: Use in-band messages for firmware version query
  soc/tegra: bpmp: Update ABI header
  firmware: tegra: Print version tag at full
  firmware: tegra: Switch to global mrq_is_supported()
  firmware: tegra: Add helper to check for supported MRQs

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
</feed>
