<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/include/uapi/drm/amdgpu_drm.h, branch v5.7</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.7</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.7'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2020-04-28T19:29:27Z</updated>
<entry>
<title>drm/amdgpu: add tiling flags from Mesa</title>
<updated>2020-04-28T19:29:27Z</updated>
<author>
<name>Marek Olšák</name>
<email>marek.olsak@amd.com</email>
</author>
<published>2020-04-18T00:50:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c938628c4478bd193bf608cf1e91a3390950a15d'/>
<id>urn:sha1:c938628c4478bd193bf608cf1e91a3390950a15d</id>
<content type='text'>
DCC_INDEPENDENT_128B is needed for displayble DCC on gfx10.
SCANOUT is not needed by the kernel, but Mesa uses it.

Signed-off-by: Marek Olšák &lt;marek.olsak@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Use better names to reflect it is CP MQD buffer</title>
<updated>2020-03-06T19:34:18Z</updated>
<author>
<name>Yong Zhao</name>
<email>Yong.Zhao@amd.com</email>
</author>
<published>2020-03-06T19:33:39Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=fa5bde8056cfb837a097785edb1e92f0985778ed'/>
<id>urn:sha1:fa5bde8056cfb837a097785edb1e92f0985778ed</id>
<content type='text'>
Add "CP" to AMDGPU_GEM_CREATE_MQD_GFX9 to indicate it is only for CP MQD
buffer.

Signed-off-by: Yong Zhao &lt;Yong.Zhao@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add DMCUB to firmware query interface</title>
<updated>2019-11-13T20:29:42Z</updated>
<author>
<name>Nicholas Kazlauskas</name>
<email>nicholas.kazlauskas@amd.com</email>
</author>
<published>2019-10-25T18:15:08Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=976e51a7c0827a870fa08df6ee0a74e937ebbbd9'/>
<id>urn:sha1:976e51a7c0827a870fa08df6ee0a74e937ebbbd9</id>
<content type='text'>
The DMCUB firmware version can be read using the AMDGPU_INFO ioctl
or the amdgpu_firmware_info debugfs entry.

Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Reviewed-by: Hersen Wu &lt;hersenxs.wu@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: return tcc_disabled_mask to userspace</title>
<updated>2019-10-03T14:11:05Z</updated>
<author>
<name>Marek Olšák</name>
<email>marek.olsak@amd.com</email>
</author>
<published>2019-09-24T21:53:25Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cf21e76a6005016474623a375ae2e90364a02168'/>
<id>urn:sha1:cf21e76a6005016474623a375ae2e90364a02168</id>
<content type='text'>
UMDs need this for correct programming of harvested chips.

Signed-off-by: Marek Olšák &lt;marek.olsak@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Extends amdgpu vm definitions (v2)</title>
<updated>2019-09-13T22:35:32Z</updated>
<author>
<name>Oak Zeng</name>
<email>Oak.Zeng@amd.com</email>
</author>
<published>2019-07-26T20:57:50Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=484deaedfa03fa0d10e0b1ad3facc910ccc951a8'/>
<id>urn:sha1:484deaedfa03fa0d10e0b1ad3facc910ccc951a8</id>
<content type='text'>
Add RW mtype introduced for arcturus.

v2:
* Don't add probe-invalidation bit from UAPI
* Don't add unused AMDGPU_MTYPE_ definitions

Signed-off-by: Oak Zeng &lt;Oak.Zeng@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Shaoyun Liu &lt;Shaoyun.Liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add flag to wipe VRAM on release</title>
<updated>2019-08-02T15:18:23Z</updated>
<author>
<name>Felix Kuehling</name>
<email>Felix.Kuehling@amd.com</email>
</author>
<published>2019-07-09T00:09:21Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d8f4981e2e8a968411105db568f3d48256b2ebbc'/>
<id>urn:sha1:d8f4981e2e8a968411105db568f3d48256b2ebbc</id>
<content type='text'>
This memory allocation flag will be used to indicate BOs containing
sensitive data that should not be leaked to other processes.

Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: extend AMDGPU_CTX_PRIORITY_NORMAL comment</title>
<updated>2019-07-16T18:08:30Z</updated>
<author>
<name>Emil Velikov</name>
<email>emil.velikov@collabora.com</email>
</author>
<published>2019-06-14T17:33:35Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cf034477321e8c88d667514923763b93a0892f49'/>
<id>urn:sha1:cf034477321e8c88d667514923763b93a0892f49</id>
<content type='text'>
Currently the AMDGPU_CTX_PRIORITY_* defines are used in both
drm_amdgpu_ctx_in::priority and drm_amdgpu_sched_in::priority.

Extend the comment to mention the CAP_SYS_NICE or DRM_MASTER requirement
is only applicable with the former.

Cc: Bas Nieuwenhuizen &lt;bas@basnieuwenhuizen.nl&gt;
Cc: Christian König &lt;christian.koenig@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Emil Velikov &lt;emil.velikov@collabora.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add pa_sc_tile_steering_override to drm_amdgpu_info_device</title>
<updated>2019-06-21T23:58:21Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2018-06-12T10:30:04Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=22e96fa62ec66ca9d21a76b74601fc200908fec3'/>
<id>urn:sha1:22e96fa62ec66ca9d21a76b74601fc200908fec3</id>
<content type='text'>
the initial/default value of pa_sc_tile_steering_override need to
be exposed to user mode driver

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add GDDR6 vram type</title>
<updated>2019-06-21T02:14:42Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2017-07-18T10:59:24Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d67383e6b764957b39667af2754920e38a5eb43e'/>
<id>urn:sha1:d67383e6b764957b39667af2754920e38a5eb43e</id>
<content type='text'>
New vram type.

Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add NV series gpu family id</title>
<updated>2019-06-20T20:54:58Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2017-07-19T01:43:26Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=107c34bcbf4737b457ca44156aa11e788cbb6b83'/>
<id>urn:sha1:107c34bcbf4737b457ca44156aa11e788cbb6b83</id>
<content type='text'>
Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
