linux/include/uapi/drm, branch v3.19

Merge tag 'drm-intel-next-2014-11-21-fixed' of git://anongit.freedesktop.org/drm-intel into drm-next

2014-12-02T22:25:59Z

drm-intel-next-2014-11-21: - infoframe tracking (for fastboot) from Jesse - start of the dri1/ums support removal - vlv forcewake timeout fixes (Imre) - bunch of patches to polish the rps code (Imre) and improve it on bdw (Tom O'Rourke) - on-demand pinning for execlist contexts - vlv/chv backlight improvements (Ville) - gen8+ render ctx w/a work from various people - skl edp programming (Satheeshakrishna et al.) - psr docbook (Rodrigo) - piles of little fixes and improvements all over, as usual * tag 'drm-intel-next-2014-11-21-fixed' of git://anongit.freedesktop.org/drm-intel: (117 commits) drm/i915: Don't pin LRC in GGTT when dumping in debugfs drm/i915: Update DRIVER_DATE to 20141121 drm/i915/g4x: fix g4x infoframe readout drm/i915: Only call mod_timer() if not already pending drm/i915: Don't rely upon encoder->type for infoframe hw state readout drm/i915: remove the IRQs enabled WARN from intel_disable_gt_powersave drm/i915: Use ggtt error obj capture helper for gen8 semaphores drm/i915: vlv: increase timeout when setting idle GPU freq drm/i915: vlv: fix cdclk setting during modeset while suspended drm/i915: Dump hdmi pipe_config state drm/i915: Gen9 shadowed registers drm/i915/skl: Gen9 multi-engine forcewake drm/i915: Read power well status before other registers for drpc info drm/i915: Pin tiled objects for L-shaped configs drm/i915: Update ring freq for full gpu freq range drm/i915: change initial rps frequency for gen8 drm/i915: Keep min freq above floor on HSW/BDW drm/i915: Use efficient frequency for HSW/BDW drm/i915: Can i915_gem_init_ioctl drm/i915: Sanitize ->lastclose ...

drm: s/enum_blob_list/enum_list/ in drm_property

2014-11-20T01:35:21Z

I guess for hysterical raisins this was meant to be the way to read blob properties. But that's done with the two-stage approach which uses separate blob kms object and the special-purpose get_blob ioctl. Shipping userspace seems to have never relied on this, and the kernel also never put any blob thing onto that property. And nowadays it would blow up, e.g. in drm_property_destroy. Also it makes no sense to return values in an ioctl that only returns metadata about everything. So let's ditch all the internal code for the blob list, rename the list to be unambiguous and sprinkle comments all over the place to explain this peculiar piece of api. v2: Squash in fixup from Rob to remove now unused variables. Cc: Rob Clark Signed-off-by: Daniel Vetter Reviewed-by: Rob Clark Signed-off-by: Dave Airlie

drm/i915: Make the physical object coherent with GTT

2014-11-14T09:29:18Z

Currently objects for which the hardware needs a contiguous physical address are allocated a shadow backing storage to satisfy the contraint. This shadow buffer is not wired into the normal obj->pages and so the physical object is incoherent with accesses via the GPU, GTT and CPU. By setting up the appropriate scatter-gather table, we can allow userspace to access the physical object via either a GTT mmaping of or by rendering into the GEM bo. However, keeping the CPU mmap of the shmemfs backing storage coherent with the contiguous shadow is not yet possible. Fortuituously, CPU mmaps of objects requiring physical addresses are not expected to be coherent anyway. This allows the physical constraint of the GEM object to be transparent to userspace and allow it to efficiently render into or update them via the GTT and GPU. v2: Fix leak of pci handle spotted by Ville v3: Remove the now duplicate call to detach_phys_object during free. v4: Wait for rendering before pwrite. As this patch makes it possible to render into the phys object, we should make it correct as well! Signed-off-by: Chris Wilson Cc: Ville Syrjälä Reviewed-by: Ville Syrjälä Signed-off-by: Rodrigo Vivi Signed-off-by: Daniel Vetter

drm/i915: Report the actual swizzling back to userspace

2014-11-07T17:42:01Z

Userspace cares about whether or not swizzling depends on the page address for its direct access into bound objects. Extend the get_tiling ioctl to report the physical swizzling value in addition to the logical swizzling value so that userspace can accurately determine when it is possible for manual detiling. Signed-off-by: Chris Wilson Cc: Akash Goel Cc: Daniel Vetter Testcase: igt/gem_tiled_wc Signed-off-by: Daniel Vetter

drm/exynos: use drm generic mmap interface

2014-09-19T16:00:13Z

This patch removes DRM_EXYNOS_GEM_MMAP ictrl feature specific to Exynos drm and instead uses drm generic mmap. We had used the interface specific to Exynos drm to do mmap directly, not to use demand paging which maps each page with physical memory at page fault handler. We don't need the specific mmap interface because the drm generic mmap which uses vm offset manager stuff can also do mmap directly. This patch makes a userspace region to be mapped with whole physical memory region allocated by userspace request when mmap system call is requested. Changelog v2: - do not set VM_IO, VM_DONTEXPEND and VM_DONTDUMP. These flags were already set by drm_gem_mmap - do not include , which isn't needed anymore. Signed-off-by: Inki Dae

drm/exynos: remove DRM_EXYNOS_GEM_MAP_OFFSET ioctl

2014-09-19T16:00:07Z

This interface and relevant codes aren't used anymore. Signed-off-by: Inki Dae

drm/vmwgfx: Fix drm.h include

2014-09-12T03:57:49Z

The userspace drm.h include doesn't prefix the drm directory. This can lead to compile failures as /usr/include/drm/ isn't in the standard gcc include paths. Fix it to be , which matches the rest of the driver drm header files that get installed into /usr/include/drm. Red Hat Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1138759 Fixes: 1d7a5cbf8f74e Reported-by: Jeffrey Bastian Signed-off-by: Josh Boyer Signed-off-by: Dave Airlie

drm/radeon: add RADEON_GEM_NO_CPU_ACCESS BO creation flag (v4)

2014-09-10T15:29:46Z

Allows pinning of buffers in the non-CPU visible portion of vram. v2: incorporate Michel's comments. v3: rebase on Michel's patch v4: rebase on Michel's v2 patch Signed-off-by: Alex Deucher Reviewed-by: Michel Dänzer

drm/radeon: Add RADEON_GEM_CPU_ACCESS BO creation flag

2014-09-10T15:29:45Z

This flag is a hint that userspace expects the BO to be accessed by the CPU. We can use that hint to prevent such BOs from ever being stored in the CPU inaccessible part of VRAM. Signed-off-by: Michel Dänzer Reviewed-by: Christian König Signed-off-by: Alex Deucher

Merge branch 'drm-next-3.18' of git://people.freedesktop.org/~agd5f/linux into drm-next

2014-08-25T23:05:14Z

radeon userptr support. * 'drm-next-3.18' of git://people.freedesktop.org/~agd5f/linux: drm/radeon: allow userptr write access under certain conditions drm/radeon: add userptr flag to register MMU notifier v3 drm/radeon: add userptr flag to directly validate the BO to GTT drm/radeon: add userptr flag to limit it to anonymous memory v2 drm/radeon: add userptr support v8 Conflicts: drivers/gpu/drm/radeon/radeon_prime.c