linux/include/video, branch v3.6

video: da8xx-fb: configure FIFO threshold to reduce underflow errors

2012-07-29T01:11:09Z

Patch works around the below silicon errata: During LCDC initialization, there is the potential for a FIFO underflow condition to occur. A FIFO underflow condition occurs when the input FIFO is completely empty and the LCDC raster controller logic that drives data to the output pins attempts to fetch data from the FIFO. When a FIFO underflow condition occurs, incorrect data will be driven out on the LCDC data pins. Software should poll the FUF bit field in the LCD_STAT register to check if an error condition has occurred or service the interrupt if FUF_EN is enabled when FUF occurs. If the FUF bit field has been set to 1, this will indicate an underflow condition has occurred and then the software should execute a reset of the LCDC via the LPSC. This problem may occur if the LCDC FIFO threshold size (LCDDMA_CTRL[TH_FIFO_READY]) is left at its default value after reset. Increasing the FIFO threshold size will reduce or eliminate underflows. Setting the threshold size to 256 double words or larger is recommended. Above issue is described in section 2.1.3 of silicon errata http://www.ti.com/lit/er/sprz313e/sprz313e.pdf Signed-off-by: Rajashekhara, Sudhakar Signed-off-by: Manjunathappa, Prakash Signed-off-by: Florian Tobias Schandinat

Merge branch 'for-florian' of git://gitorious.org/linux-omap-dss2/linux into fbdev-next

2012-07-25T08:55:46Z

Conflicts: drivers/video/omap2/dss/core.c drivers/video/omap2/dss/dispc.c

sh_mobile_meram: Add direct MERAM allocation API

2012-07-19T00:05:22Z

The API can be used to allocate and free MERAM blocks directly, without going through ICBs. Signed-off-by: Laurent Pinchart

sh_mobile_meram: Use direct function calls for the public API

2012-07-19T00:05:21Z

There's no reason to use abstract operation pointers to implement the MERAM API. Replace them by direct function calls. Signed-off-by: Laurent Pinchart

sh_mobile_meram: Rename operations to cache_[alloc|free|update]

2012-07-19T00:05:21Z

The MERAM operations meram_register, meram_unregister and meram_update handle LCDC cache. In preparation for "raw" MERAM allocation, rename them to more appropriate names. Signed-off-by: Laurent Pinchart

OMAPDSS: DSI: Fix HSYNC, VSYNC and DE polarities between DISPC and DSI

2012-06-29T07:15:54Z

For DSI operation in videomode, DISPC logic levels for the signals HSYNC, VSYNC and DE need to be specified to DSI via the fields VP_HSYNC_POL, VP_VSYNC_POL and VP_DE_POL in DSI_CTRL registers. This information is completely internal to DSS as logic levels for the above signals hold no meaning on the DSI bus. Hence a DSI panel driver should be totally oblivious of these fields. Fix the logic levels/polarities in the DISPC and DSI registers to a default value. This is done by overriding these fields in omap_video_timings struct filled by the panel driver for DISPC, and use the equivalent default values when programming DSI_CTRL registers. Also, remove the redundant polarity related fields in omap_dss_dsi_videomode_data. Signed-off-by: Archit Taneja

OMAPDSS: Add interlace parameter to omap_video_timings

2012-06-29T07:15:52Z

Add a parameter called interlace which tells whether the timings are in interlaced or progressive mode. This aligns the omap_video_timings struct with the Xorg modeline configuration. It also removes the hack needed to write to divide the manager height by 2 if the connected interface is VENC. Signed-off-by: Archit Taneja

OMAPDSS: Remove omap_panel_config enum from omap_dss_device

2012-06-29T07:15:51Z

omap_panel_config contains fields which are finally written to DISPC_POL_FREQo registers. These are now held by omap_video_timings and are set when the manager timings are applied. Remove the omap_panel_config enum, and remove all it's references from panel or interface drivers. Signed-off-by: Archit Taneja

OMAPDSS: Add some new fields to omap_video_timings

2012-06-29T07:15:49Z

Some panel timing related fields are contained in omap_panel_config in the form of flags. The fields are: - Hsync logic level - Vsync logic level - Data driven on rising/falling edge of pixel clock - Output enable/Data enable logic level - HSYNC/VSYNC driven on rising/falling edge of pixel clock Out of these parameters, Hsync and Vsync logic levels are a part of the timings in the Xorg modeline configuration. So it makes sense to move the to omap_video_timings. The rest aren't a part of modeline, but it still makes sense to move these since they are related to panel timings. These fields stored in omap_panel_config in dssdev are configured for LCD panels, and the corresponding LCD managers in the DISPC_POL_FREQo registers. Add the above fields in omap_video_timings. Represent their state via new enums. Add these parameters to the omap_video_timings instances in the panel drivers. Keep the corresponding IVS, IHS, IPC, IEO, RF and ONOFF flags in omap_panel_config for now. The struct will be removed later. Signed-off-by: Archit Taneja

OMAPDSS: Remove passive matrix LCD support (part 3)

2012-06-29T07:15:46Z

Remove omap_lcd_display_type enum The enum omap_lcd_display_type is used to configure the lcd display type in DISPC. Remove this enum and always set display type to TFT by creating function dss_mgr_set_lcd_type_tft(). Signed-off-by: Archit Taneja