<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/tools/perf/util/cs-etm-decoder, branch master</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=master</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2026-03-25T07:06:23Z</updated>
<entry>
<title>Merge tag 'perf-tools-fixes-for-v7.0-2-2026-03-23' into perf-tools-next</title>
<updated>2026-03-25T07:06:23Z</updated>
<author>
<name>Namhyung Kim</name>
<email>namhyung@kernel.org</email>
</author>
<published>2026-03-25T07:06:23Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=54fcc7f6ec3944ae7c1b0246a999744e33839cdb'/>
<id>urn:sha1:54fcc7f6ec3944ae7c1b0246a999744e33839cdb</id>
<content type='text'>
To get the various fixes for v7.0.

Signed-off-by: Namhyung Kim &lt;namhyung@kernel.org&gt;
</content>
</entry>
<entry>
<title>perf: tools: cs-etm: Enhance raw Coresight trace debug display</title>
<updated>2026-03-18T18:48:09Z</updated>
<author>
<name>Mike Leach</name>
<email>mike.leach@arm.com</email>
</author>
<published>2026-03-18T10:36:40Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=35cd0098eeb9601844cb82c4402fa7e6576c8b01'/>
<id>urn:sha1:35cd0098eeb9601844cb82c4402fa7e6576c8b01</id>
<content type='text'>
When compiling perf with CORESIGHT=1, an additional build option may
be used: CSTRACE_RAW=1, which will cause the CoreSight formatted trace
frames to be printed out during a perf --dump command. This is useful
when investigating issues with trace generation, decode or possible
data corruption.

e.g. for ETMv4 trace source into a formatted ETR sink a dump -

. ... CoreSight ETMV4I Trace data: size 0x28c150 bytes
Idx:0; ID:14;	I_ASYNC : Alignment Synchronisation.
Idx:12; ID:14;	I_TRACE_INFO : Trace Info.; INFO=0x0 { CC.0 };
                Decoder Sync point TINFO
Idx:17; ID:14;	I_ADDR_L_64IS0 : Address, Long, 64 bit, IS0.;
                Addr=0x0000000000000000;

becomes with CSTRACE_RAW=1:

. ... CoreSight ETMV4I Trace data: size 0x28c150 bytes
Frame Data; Index 0; ID_DATA[0x14]; 00 00 00 00 00 00 00 00
                                    00 00 00 80 01 01
Idx:0; ID:14;	I_ASYNC : Alignment Synchronisation.
Frame Data; Index 16; ID_DATA[0x14]; 00 9d 00 00 00 00 00 00
                                     00 00 04 85 57 08 f2
Idx:12; ID:14;	I_TRACE_INFO : Trace Info.; INFO=0x0 { CC.0 };
                Decoder Sync point TINFO
Idx:17; ID:14;	I_ADDR_L_64IS0 : Address, Long, 64 bit, IS0.;
                Addr=0x0000000000000000;

CSTRACE_RAW=1 has no effect on ETE + TRBE trace as there is no trace
formatting in the TRBE buffer.

This patch enhances the output so that for each packet the individual
bytes associated with the packet are printed.

Thus for ETMv4 this now becomes:

. ... CoreSight ETMV4I Trace data: size 0x28c150 bytes
Frame Data; Index 0; ID_DATA[0x14]; 00 00 00 00 00 00 00 00
                                    00 00 00 80 01 01
Idx:0; ID:14;[0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x80];
             I_ASYNC : Alignment Synchronisation.
Frame Data; Index 16; ID_DATA[0x14]; 00 9d 00 00 00 00 00 00
                                     00 00 04 85 57 08 f2
Idx:12; ID:14; [0x01 0x01 0x00 ]; I_TRACE_INFO : Trace Info.; INFO=0x0
                                  { CC.0 }; Decoder Sync point TINFO
Idx:17; ID:14; [0x9d 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 ];
               I_ADDR_L_64IS0 : Address, Long, 64 bit, IS0.;
	       Addr=0x0000000000000000;

ETE trace output changes from:

Idx:0; ID:14; I_ASYNC : Alignment Synchronisation.
Idx:12; ID:14; I_TRACE_INFO : Trace Info.; INFO=0x0 { CC.0, TSTATE.0 };
               Decoder Sync point TINFO
Idx:15; ID:14; I_ADDR_L_64IS0 : Address, Long, 64 bit, IS0.;
               Addr=0xFFFF80007CF7F56C;
becoming:

Idx:0; ID:14;[0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x80];
              I_ASYNC : Alignment Synchronisation.
Idx:12; ID:14; [0x01 0x01 0x00 ]; I_TRACE_INFO : Trace Info.; INFO=0x0
               { CC.0, TSTATE.0 }; Decoder Sync point TINFO
Idx:15; ID:14; [0x9d 0x5b 0x7a 0xf7 0x7c 0x00 0x80 0xff 0xff ];
               I_ADDR_L_64IS0 : Address, Long, 64 bit, IS0.;
	       Addr=0xFFFF80007CF7F56C;

Tested-by: Leo Yan &lt;leo.yan@arm.com&gt;
Signed-off-by: Mike Leach &lt;mike.leach@arm.com&gt;
Acked-by: Arnaldo Carvalho de Melo &lt;acme@redhat.com&gt;
Signed-off-by: Namhyung Kim &lt;namhyung@kernel.org&gt;
</content>
</entry>
<entry>
<title>perf: tools: cs-etm: Fix print issue for Coresight debug in ETE/TRBE trace</title>
<updated>2026-03-18T18:47:24Z</updated>
<author>
<name>Mike Leach</name>
<email>mike.leach@arm.com</email>
</author>
<published>2026-03-18T10:36:39Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6c478e7b3eba3f387a2d6c749e3e3ee0f8ad1c53'/>
<id>urn:sha1:6c478e7b3eba3f387a2d6c749e3e3ee0f8ad1c53</id>
<content type='text'>
Building perf with CORESIGHT=1 and the optional CSTRACE_RAW=1 enables
additional debug printing of raw trace data when using command:-
perf report --dump.

This raw trace prints the CoreSight formatted trace frames, which may be
used to investigate suspected issues with trace quality / corruption /
decode.

These frames are not present in ETE + TRBE trace.
This fix removes the unnecessary call to print these frames.

This fix also rationalises implementation - original code had helper
function that unnecessarily repeated initialisation calls that had
already been made.

Due to an addtional fault with the OpenCSD library, this call when ETE/TRBE
are being decoded will cause a segfault in perf. This fix also prevents
that problem for perf using older (&lt;= 1.8.0 version) OpenCSD libraries.

Fixes: 68ffe3902898 ("perf tools: Add decoder mechanic to support dumping trace data")
Reported-by: Leo Yan &lt;leo.yan@arm.com&gt;
Signed-off-by: Mike Leach &lt;mike.leach@arm.com&gt;
Signed-off-by: Namhyung Kim &lt;namhyung@kernel.org&gt;
</content>
</entry>
<entry>
<title>perf cs-etm: Finish removal of ETM_OPT_*</title>
<updated>2026-03-10T12:50:44Z</updated>
<author>
<name>James Clark</name>
<email>james.clark@linaro.org</email>
</author>
<published>2026-03-06T14:08:34Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3c3b41e5911db7668e3938eae8df7ed80c76c153'/>
<id>urn:sha1:3c3b41e5911db7668e3938eae8df7ed80c76c153</id>
<content type='text'>
These #defines have been removed from the kernel headers in favour of
the string based PMU format attributes. Usages were previously removed
from the recording side of cs-etm in Perf. Finish the removal by
removing usages from the decode side too.

It's a straight replacement of the old #defines with the new register
bit definitions. Except cs_etm__setup_timeless_decoding() which wasn't
looking at the saved metadata and was instead hard coding an access to
'attr.config'. This was vulnerable to the same issue of .config being
moved to .config2 etc that the original removal of ETM_OPT_* tried to
fix. So fix that too.

Signed-off-by: James Clark &lt;james.clark@linaro.org&gt;
Tested-by: Leo Yan &lt;leo.yan@arm.com&gt;
Cc: Adrian Hunter &lt;adrian.hunter@intel.com&gt;
Cc: Alexander Shishkin &lt;alexander.shishkin@linux.intel.com&gt;
Cc: Ian Rogers &lt;irogers@google.com&gt;
Cc: Ingo Molnar &lt;mingo@redhat.com&gt;
Cc: Jiri Olsa &lt;jolsa@kernel.org&gt;
Cc: John Garry &lt;john.g.garry@oracle.com&gt;
Cc: Leo Yan &lt;leo.yan@linux.dev&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Mike Leach &lt;mike.leach@arm.com&gt;
Cc: Namhyung Kim &lt;namhyung@kernel.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Suzuki Poulouse &lt;suzuki.poulose@arm.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Signed-off-by: Arnaldo Carvalho de Melo &lt;acme@redhat.com&gt;
</content>
</entry>
<entry>
<title>perf build: Remove NO_AUXTRACE build option</title>
<updated>2025-11-14T07:03:11Z</updated>
<author>
<name>Ian Rogers</name>
<email>irogers@google.com</email>
</author>
<published>2025-11-10T01:31:51Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=754187ad73b73bcb44f106a8e5fc88789beff1bd'/>
<id>urn:sha1:754187ad73b73bcb44f106a8e5fc88789beff1bd</id>
<content type='text'>
The NO_AUXTRACE build option was used when the __get_cpuid feature
test failed or if it was provided on the command line. The option no
longer avoids a dependency on a library and so having the option is
just adding complexity to the code base. Remove the option
CONFIG_AUXTRACE from Build files and HAVE_AUXTRACE_SUPPORT by assuming
it is always defined.

Signed-off-by: Ian Rogers &lt;irogers@google.com&gt;
Reviewed-by: James Clark &lt;james.clark@linaro.org&gt;
Signed-off-by: Namhyung Kim &lt;namhyung@kernel.org&gt;
</content>
</entry>
<entry>
<title>perf cs-etm: Mute enumeration value warning</title>
<updated>2025-10-24T01:59:13Z</updated>
<author>
<name>Leo Yan</name>
<email>leo.yan@arm.com</email>
</author>
<published>2025-10-22T14:28:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3e98f0203e10bc9d379852faf424f769ef5049a6'/>
<id>urn:sha1:3e98f0203e10bc9d379852faf424f769ef5049a6</id>
<content type='text'>
When the OpenCSD library introduces a new enumeration value (for example,
in the v1.7.1 release), the perf build fails with an error:

  util/cs-etm-decoder/cs-etm-decoder.c:600:10: error: enumeration value 'OCSD_GEN_TRC_ELEM_ITMTRACE' not explicitly handled in switch [-Werror, -Wswitch-enum]
    600 |         switch (elem-&gt;elem_type) {
	|                 ^~~~~~~~~~~~~~~
  1 error generated.

Convert to if-else sentences to mute the enumeration value warning,
which can avoid build failures whenever the lib is updated.

No functional change.

Suggested-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Signed-off-by: Leo Yan &lt;leo.yan@arm.com&gt;
Reviewed-by: James Clark &lt;james.clark@linaro.org&gt;
Signed-off-by: Namhyung Kim &lt;namhyung@kernel.org&gt;
</content>
</entry>
<entry>
<title>perf cs-etm: Use new OpenCSD consistency checks</title>
<updated>2024-09-24T18:46:46Z</updated>
<author>
<name>James Clark</name>
<email>james.clark@linaro.org</email>
</author>
<published>2024-09-16T13:57:33Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ba5ae78a5a2a956d281ac62f581ab95e618bbf18'/>
<id>urn:sha1:ba5ae78a5a2a956d281ac62f581ab95e618bbf18</id>
<content type='text'>
Previously when the incorrect binary was used for decode, Perf would
silently continue to generate incorrect samples. With OpenCSD 1.5.4 we
can enable consistency checks that do a best effort to detect a mismatch
in the image. When one is detected a warning is printed and sample
generation stops until the trace resynchronizes with a good part of the
image.

Reported-by: Ganapatrao Kulkarni &lt;gankulkarni@os.amperecomputing.com&gt;
Closes: https://lore.kernel.org/all/20240719092619.274730-1-gankulkarni@os.amperecomputing.com/
Reviewed-by: Leo Yan &lt;leo.yan@arm.com&gt;
Signed-off-by: James Clark &lt;james.clark@linaro.org&gt;
Tested-by: Ganapatrao Kulkarni &lt;gankulkarni@os.amperecomputing.com&gt;
Cc: Ben Gainey &lt;ben.gainey@arm.com&gt;
Cc: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Cc: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Cc: Mike Leach &lt;mike.leach@linaro.org&gt;
Cc: Ruidong Tian &lt;tianruidong@linux.alibaba.com&gt;
Cc: Leo Yan &lt;leo.yan@linux.dev&gt;
Cc: Benjamin Gray &lt;bgray@linux.ibm.com&gt;
Cc: linux-arm-kernel@lists.infradead.org
Cc: coresight@lists.linaro.org
Cc: John Garry &lt;john.g.garry@oracle.com&gt;
Cc: scclevenger@os.amperecomputing.com
Link: https://lore.kernel.org/r/20240916135743.1490403-3-james.clark@linaro.org
Signed-off-by: Namhyung Kim &lt;namhyung@kernel.org&gt;
</content>
</entry>
<entry>
<title>perf: cs-etm: Print queue number in raw trace dump</title>
<updated>2024-08-29T18:56:37Z</updated>
<author>
<name>James Clark</name>
<email>james.clark@arm.com</email>
</author>
<published>2024-07-22T10:11:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=022aa67b5ab9077d8f5bf02df5a7f0f2d4dfb909'/>
<id>urn:sha1:022aa67b5ab9077d8f5bf02df5a7f0f2d4dfb909</id>
<content type='text'>
Now that we have overlapping trace IDs it's also useful to know what the
queue number is to be able to distinguish the source of the trace so
print it inline. Hide it behind the -v option because it might not be
obvious to users what the queue number is.

Reviewed-by: Mike Leach &lt;mike.leach@linaro.org&gt;
Signed-off-by: James Clark &lt;james.clark@arm.com&gt;
Cc: Adrian Hunter &lt;adrian.hunter@intel.com&gt;
Cc: Alexander Shishkin &lt;alexander.shishkin@linux.intel.com&gt;
Cc: Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt;
Cc: Anshuman Khandual &lt;anshuman.khandual@arm.com&gt;
Cc: Ganapatrao Kulkarni &lt;gankulkarni@os.amperecomputing.com&gt;
Cc: Ian Rogers &lt;irogers@google.com&gt;
Cc: Ingo Molnar &lt;mingo@redhat.com&gt;
Cc: Jiri Olsa &lt;jolsa@kernel.org&gt;
Cc: John Garry &lt;john.g.garry@oracle.com&gt;
Cc: Kan Liang &lt;kan.liang@linux.intel.com&gt;
Cc: Leo Yan &lt;leo.yan@linux.dev&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Maxime Coquelin &lt;mcoquelin.stm32@gmail.com&gt;
Cc: Namhyung Kim &lt;namhyung@kernel.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Suzuki Poulouse &lt;suzuki.poulose@arm.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Link: https://lore.kernel.org/r/20240722101202.26915-8-james.clark@linaro.org
Signed-off-by: James Clark &lt;james.clark@linaro.org&gt;
Signed-off-by: Arnaldo Carvalho de Melo &lt;acme@redhat.com&gt;
</content>
</entry>
<entry>
<title>perf: cs-etm: Create decoders based on the trace ID mappings</title>
<updated>2024-08-29T18:55:24Z</updated>
<author>
<name>James Clark</name>
<email>james.clark@arm.com</email>
</author>
<published>2024-07-22T10:11:46Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=19c3e4db38c5bf30c7e7b53dad5a464d7031dec4'/>
<id>urn:sha1:19c3e4db38c5bf30c7e7b53dad5a464d7031dec4</id>
<content type='text'>
Now that each queue has a unique set of trace ID mappings, use this
list to create the decoders. In unformatted mode just add a single
mapping so only one decoder is made.

Previously each queue would have a decoder created for each traced CPU
on the system but this won't work anymore because CPUs can have
overlapping trace IDs.

This also means that the CORESIGHT_TRACE_ID_UNUSED_FLAG isn't needed
any more. If mappings aren't added then decoders aren't created, rather
than needing a flag to suppress creation.

Reviewed-by: Mike Leach &lt;mike.leach@linaro.org&gt;
Signed-off-by: James Clark &lt;james.clark@arm.com&gt;
Cc: Adrian Hunter &lt;adrian.hunter@intel.com&gt;
Cc: Alexander Shishkin &lt;alexander.shishkin@linux.intel.com&gt;
Cc: Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt;
Cc: Anshuman Khandual &lt;anshuman.khandual@arm.com&gt;
Cc: Ganapatrao Kulkarni &lt;gankulkarni@os.amperecomputing.com&gt;
Cc: Ian Rogers &lt;irogers@google.com&gt;
Cc: Ingo Molnar &lt;mingo@redhat.com&gt;
Cc: Jiri Olsa &lt;jolsa@kernel.org&gt;
Cc: John Garry &lt;john.g.garry@oracle.com&gt;
Cc: Kan Liang &lt;kan.liang@linux.intel.com&gt;
Cc: Leo Yan &lt;leo.yan@linux.dev&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Maxime Coquelin &lt;mcoquelin.stm32@gmail.com&gt;
Cc: Namhyung Kim &lt;namhyung@kernel.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Suzuki Poulouse &lt;suzuki.poulose@arm.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Link: https://lore.kernel.org/r/20240722101202.26915-5-james.clark@linaro.org
Signed-off-by: James Clark &lt;james.clark@linaro.org&gt;
Signed-off-by: Arnaldo Carvalho de Melo &lt;acme@redhat.com&gt;
</content>
</entry>
<entry>
<title>perf: cs-etm: Move traceid_list to each queue</title>
<updated>2024-08-29T18:54:40Z</updated>
<author>
<name>James Clark</name>
<email>james.clark@arm.com</email>
</author>
<published>2024-07-22T10:11:45Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=77c123f53e97ad4bde0271eb671b71774a99ebf6'/>
<id>urn:sha1:77c123f53e97ad4bde0271eb671b71774a99ebf6</id>
<content type='text'>
The global list won't work for per-sink trace ID allocations, so put a
list in each queue where the IDs will be unique to that queue.

To keep the same behavior as before, for version 0 of the HW_ID packets,
copy all the HW_ID mappings into all queues.

This change doesn't effect the decoders, only trace ID lookups on the
Perf side. The decoders are still created with global mappings which
will be fixed in a later commit.

Reviewed-by: Mike Leach &lt;mike.leach@linaro.org&gt;
Signed-off-by: James Clark &lt;james.clark@arm.com&gt;
Cc: Adrian Hunter &lt;adrian.hunter@intel.com&gt;
Cc: Alexander Shishkin &lt;alexander.shishkin@linux.intel.com&gt;
Cc: Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt;
Cc: Anshuman Khandual &lt;anshuman.khandual@arm.com&gt;
Cc: Ganapatrao Kulkarni &lt;gankulkarni@os.amperecomputing.com&gt;
Cc: Ian Rogers &lt;irogers@google.com&gt;
Cc: Ingo Molnar &lt;mingo@redhat.com&gt;
Cc: Jiri Olsa &lt;jolsa@kernel.org&gt;
Cc: John Garry &lt;john.g.garry@oracle.com&gt;
Cc: Kan Liang &lt;kan.liang@linux.intel.com&gt;
Cc: Leo Yan &lt;leo.yan@linux.dev&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Maxime Coquelin &lt;mcoquelin.stm32@gmail.com&gt;
Cc: Namhyung Kim &lt;namhyung@kernel.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Suzuki Poulouse &lt;suzuki.poulose@arm.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Link: https://lore.kernel.org/r/20240722101202.26915-4-james.clark@linaro.org
Signed-off-by: James Clark &lt;james.clark@linaro.org&gt;
Signed-off-by: Arnaldo Carvalho de Melo &lt;acme@redhat.com&gt;
</content>
</entry>
</feed>
