<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/tools/power, branch v5.3</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.3</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.3'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2019-08-31T18:48:39Z</updated>
<entry>
<title>tools/power turbostat: update version number</title>
<updated>2019-08-31T18:48:39Z</updated>
<author>
<name>Len Brown</name>
<email>len.brown@intel.com</email>
</author>
<published>2019-08-31T18:40:39Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9eb4b5180d33c827f16829644ae0cd7382ecdb82'/>
<id>urn:sha1:9eb4b5180d33c827f16829644ae0cd7382ecdb82</id>
<content type='text'>
Today is 19.08.31, at least in some parts of the world.

Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power turbostat: Add support for Hygon Fam 18h (Dhyana) RAPL</title>
<updated>2019-08-31T18:48:39Z</updated>
<author>
<name>Pu Wen</name>
<email>puwen@hygon.cn</email>
</author>
<published>2019-08-31T02:20:31Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c1c10cc77883932abdb7b103687ecbb01e80bef9'/>
<id>urn:sha1:c1c10cc77883932abdb7b103687ecbb01e80bef9</id>
<content type='text'>
Commit 9392bd98bba760be96ee ("tools/power turbostat: Add support for AMD
Fam 17h (Zen) RAPL") and the commit 3316f99a9f1b68c578c5 ("tools/power
turbostat: Also read package power on AMD F17h (Zen)") add AMD Fam 17h
RAPL support.

Hygon Family 18h(Dhyana) support RAPL in bit 14 of CPUID 0x80000007 EDX,
and has MSRs RAPL_PWR_UNIT/CORE_ENERGY_STAT/PKG_ENERGY_STAT. So add Hygon
Dhyana Family 18h support for RAPL.

Already tested on Hygon multi-node systems and it shows correct per-core
energy usage and the total package power.

Signed-off-by: Pu Wen &lt;puwen@hygon.cn&gt;
Reviewed-by: Calvin Walton &lt;calvin.walton@kepstin.ca&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power turbostat: Fix caller parameter of get_tdp_amd()</title>
<updated>2019-08-31T18:48:39Z</updated>
<author>
<name>Pu Wen</name>
<email>puwen@hygon.cn</email>
</author>
<published>2019-08-31T02:19:58Z</published>
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<id>urn:sha1:9cfa8e042f7cbb1994cc5923e46c78b36f6054f4</id>
<content type='text'>
Commit 9392bd98bba760be96ee ("tools/power turbostat: Add support for AMD
Fam 17h (Zen) RAPL") add a function get_tdp_amd(), the parameter is CPU
family. But the rapl_probe_amd() function use wrong model parameter.
Fix the wrong caller parameter of get_tdp_amd() to use family.

Cc: &lt;stable@vger.kernel.org&gt; # v5.1+
Signed-off-by: Pu Wen &lt;puwen@hygon.cn&gt;
Reviewed-by: Calvin Walton &lt;calvin.walton@kepstin.ca&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power turbostat: Fix CPU%C1 display value</title>
<updated>2019-08-31T18:48:39Z</updated>
<author>
<name>Srinivas Pandruvada</name>
<email>srinivas.pandruvada@linux.intel.com</email>
</author>
<published>2019-08-27T17:57:14Z</published>
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<id>urn:sha1:1e9042b9c8d46ada9ee7b3339a31f50d12e5d291</id>
<content type='text'>
In some case C1% will be wrong value, when platform doesn't have MSR for
C1 residency.

For example:
Core    CPU     CPU%c1
-       -       100.00
0       0       100.00
0       2       100.00
1       1       100.00
1       3       100.00

But adding Busy% will fix this
Core    CPU     Busy%   CPU%c1
-       -       99.77   0.23
0       0       99.77   0.23
0       2       99.77   0.23
1       1       99.77   0.23
1       3       99.77   0.23

This issue can be reproduced on most of the recent systems including
Broadwell, Skylake and later.

This is because if we don't select Busy% or Avg_MHz or Bzy_MHz then
mperf value will not be read from MSR, so it will be 0. But this
is required for C1% calculation when MSR for C1 residency is not present.
Same is true for C3, C6 and C7 column selection.

So add another define DO_BIC_READ(), which doesn't depend on user
column selection and use for mperf, C3, C6 and C7 related counters.
So when there is no platform support for C1 residency counters,
we still read these counters, if the CPU has support and user selected
display of CPU%c1.

Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power turbostat: do not enforce 1ms</title>
<updated>2019-08-31T18:48:39Z</updated>
<author>
<name>Artem Bityutskiy</name>
<email>artem.bityutskiy@linux.intel.com</email>
</author>
<published>2019-08-14T17:12:56Z</published>
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<id>urn:sha1:6ee9fc63d2e7999f93a466e202ae3b557e9c739c</id>
<content type='text'>
Turbostat works by taking a snapshot of counters, sleeping, taking another
snapshot, calculating deltas, and printing out the table.

The sleep time is controlled via -i option or by user sending a signal or a
character to stdin. In the latter case, turbostat always adds 1 ms
sleep before it reads the counters, in order to avoid larger imprecisions
in the results in prints.

While the 1 ms delay may be a good idea for a "dumb" user, it is a
problem for an "aware" user. I do thousands and thousands of measurements
over a short period of time (like 2ms), and turbostat unconditionally adds
a 1ms to my interval, so I cannot get what I really need.

This patch removes the unconditional 1ms sleep. This is an expert user
tool, after all, and non-experts will unlikely ever use it in the non-fixed
interval mode anyway, so I think it is OK to remove the 1ms delay.

Signed-off-by: Artem Bityutskiy &lt;artem.bityutskiy@linux.intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power turbostat: read from pipes too</title>
<updated>2019-08-31T18:48:39Z</updated>
<author>
<name>Artem Bityutskiy</name>
<email>artem.bityutskiy@linux.intel.com</email>
</author>
<published>2019-08-14T17:12:55Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c026c23629b825100fd4b8223227d9a395f9a56b'/>
<id>urn:sha1:c026c23629b825100fd4b8223227d9a395f9a56b</id>
<content type='text'>
Commit '47936f944e78 tools/power turbostat: fix printing on input' make
a valid fix, but it completely disabled piped stdin support, which is
a valuable use-case. Indeed, if stdin is a pipe, turbostat won't read
anything from it, so it becomes impossible to get turbostat output at
user-defined moments, instead of the regular intervals.

There is no reason why this should works for terminals, but not for
pipes. This patch improves the situation. Instead of ignoring pipes, we
read data from them but gracefully handle the EOF case.

Signed-off-by: Artem Bityutskiy &lt;artem.bityutskiy@linux.intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power turbostat: Add Ice Lake NNPI support</title>
<updated>2019-08-31T18:48:39Z</updated>
<author>
<name>Rajneesh Bhardwaj</name>
<email>rajneesh.bhardwaj@linux.intel.com</email>
</author>
<published>2019-06-14T07:39:46Z</published>
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<id>urn:sha1:d93ea567fc4eec2d3581015e23d2c555f8b393ba</id>
<content type='text'>
This enables turbostat utility on Ice Lake NNPI SoC.

Link: https://lkml.org/lkml/2019/6/5/1034
Signed-off-by: Rajneesh Bhardwaj &lt;rajneesh.bhardwaj@linux.intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power turbostat: rename has_hsw_msrs()</title>
<updated>2019-08-31T18:48:39Z</updated>
<author>
<name>Len Brown</name>
<email>len.brown@intel.com</email>
</author>
<published>2019-08-31T18:16:07Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=570992fc5733b5e1b00a4bdb9272df1e25d63972'/>
<id>urn:sha1:570992fc5733b5e1b00a4bdb9272df1e25d63972</id>
<content type='text'>
Perhaps if this more descriptive name had been used,
then we wouldn't have had the HSW ULT vs HSW CORE bug,
fixed by the previous commit.

Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power turbostat: Fix Haswell Core systems</title>
<updated>2019-08-31T18:48:39Z</updated>
<author>
<name>Len Brown</name>
<email>len.brown@intel.com</email>
</author>
<published>2019-08-31T18:09:29Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cd188af5282d9f9e65f63915b13239bafc746f8d'/>
<id>urn:sha1:cd188af5282d9f9e65f63915b13239bafc746f8d</id>
<content type='text'>
turbostat: cpu0: msr offset 0x630 read failed: Input/output error

because Haswell Core does not have C8-C10.

Output C8-C10 only on Haswell ULT.

Fixes: f5a4c76ad7de ("tools/power turbostat: consolidate duplicate model numbers")

Reported-by: Prarit Bhargava &lt;prarit@redhat.com&gt;
Suggested-by: Kosuke Tatsukawa &lt;tatsu@ab.jp.nec.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power turbostat: add Jacobsville support</title>
<updated>2019-08-31T18:48:39Z</updated>
<author>
<name>Zhang Rui</name>
<email>rui.zhang@intel.com</email>
</author>
<published>2019-04-21T08:30:22Z</published>
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<id>urn:sha1:b62b3184576b8f87ca655dd9bfd1ae02fd4e50a5</id>
<content type='text'>
Jacobsville behaves like Denverton.

Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
</feed>
