aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm64/boot/dts/qcom/qcm2290.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm64/boot/dts/qcom/qcm2290.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/qcm2290.dtsi112
1 files changed, 112 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
index fa24b77a31a7..08141b41de24 100644
--- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
@@ -154,6 +154,7 @@
compatible = "qcom,scm-qcm2290", "qcom,scm";
clocks = <&rpmcc RPM_SMD_CE1_CLK>;
clock-names = "core";
+ qcom,dload-mode = <&tcsr_regs 0x13000>;
#reset-cells = <1>;
interconnects = <&system_noc MASTER_CRYPTO_CORE0 RPM_ALWAYS_TAG
&bimc SLAVE_EBI1 RPM_ALWAYS_TAG>;
@@ -565,6 +566,20 @@
bias-disable;
};
+ cci0_default: cci0-default-state {
+ pins = "gpio22", "gpio23";
+ function = "cci_i2c";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ cci1_default: cci1-default-state {
+ pins = "gpio29", "gpio30";
+ function = "cci_i2c";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
sdc1_state_on: sdc1-on-state {
clk-pins {
pins = "sdc1_clk";
@@ -953,6 +968,11 @@
qcom,ddr-config = <0x80040868>;
bus-width = <8>;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+
status = "disabled";
sdhc1_opp_table: opp-table {
@@ -1454,6 +1474,7 @@
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x10>;
snps,usb3_lpm_capable;
+ snps,parkmode-disable-ss-quirk;
maximum-speed = "super-speed";
dr_mode = "otg";
usb-role-switch;
@@ -1628,6 +1649,42 @@
#iommu-cells = <2>;
};
+ cci: cci@5c1b000 {
+ compatible = "qcom,qcm2290-cci", "qcom,msm8996-cci";
+ reg = <0x0 0x5c1b000 0x0 0x1000>;
+
+ interrupts = <GIC_SPI 206 IRQ_TYPE_EDGE_RISING>;
+
+ clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, <&gcc GCC_CAMSS_CCI_0_CLK>;
+ clock-names = "ahb", "cci";
+ assigned-clocks = <&gcc GCC_CAMSS_CCI_0_CLK>;
+ assigned-clock-rates = <37500000>;
+
+ power-domains = <&gcc GCC_CAMSS_TOP_GDSC>;
+
+ pinctrl-0 = <&cci0_default &cci1_default>;
+ pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+
+ cci_i2c0: i2c-bus@0 {
+ reg = <0>;
+ clock-frequency = <400000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ cci_i2c1: i2c-bus@1 {
+ reg = <1>;
+ clock-frequency = <400000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
camss: camss@5c6e000 {
compatible = "qcom,qcm2290-camss";
@@ -2096,6 +2153,61 @@
<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
};
+ venus: video-codec@5a00000 {
+ compatible = "qcom,qcm2290-venus";
+ reg = <0 0x5a00000 0 0xf0000>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+
+ power-domains = <&gcc GCC_VENUS_GDSC>,
+ <&gcc GCC_VCODEC0_GDSC>,
+ <&rpmpd QCM2290_VDDCX>;
+ power-domain-names = "venus",
+ "vcodec0",
+ "cx";
+ operating-points-v2 = <&venus_opp_table>;
+
+ clocks = <&gcc GCC_VIDEO_VENUS_CTL_CLK>,
+ <&gcc GCC_VIDEO_AHB_CLK>,
+ <&gcc GCC_VENUS_CTL_AXI_CLK>,
+ <&gcc GCC_VIDEO_THROTTLE_CORE_CLK>,
+ <&gcc GCC_VIDEO_VCODEC0_SYS_CLK>,
+ <&gcc GCC_VCODEC0_AXI_CLK>;
+ clock-names = "core",
+ "iface",
+ "bus",
+ "throttle",
+ "vcodec0_core",
+ "vcodec0_bus";
+
+ memory-region = <&pil_video_mem>;
+ iommus = <&apps_smmu 0x860 0x0>,
+ <&apps_smmu 0x880 0x0>,
+ <&apps_smmu 0x861 0x04>,
+ <&apps_smmu 0x863 0x0>,
+ <&apps_smmu 0x804 0xe0>;
+
+ interconnects = <&mmnrt_virt MASTER_VIDEO_P0 RPM_ALWAYS_TAG
+ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>,
+ <&bimc MASTER_APPSS_PROC RPM_ACTIVE_TAG
+ &config_noc SLAVE_VENUS_CFG RPM_ACTIVE_TAG>;
+ interconnect-names = "video-mem",
+ "cpu-cfg";
+
+ venus_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-133333333 {
+ opp-hz = /bits/ 64 <133333333>;
+ required-opps = <&rpmpd_opp_low_svs>;
+ };
+
+ opp-240000000 {
+ opp-hz = /bits/ 64 <240000000>;
+ required-opps = <&rpmpd_opp_svs>;
+ };
+ };
+ };
+
wifi: wifi@c800000 {
compatible = "qcom,wcn3990-wifi";
reg = <0x0 0x0c800000 0x0 0x800000>;