aboutsummaryrefslogtreecommitdiffstats
path: root/tools/perf/scripts/python/bin/stackcollapse-report
diff options
context:
space:
mode:
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-report')
0 files changed, 0 insertions, 0 deletions
9-19clk: spacemit: introduce pre-div for ddn clockTroy Mitchell3-10/+12 2025-09-19dt-bindings: clock: spacemit: introduce i2s pre-clock to fix i2s clockTroy Mitchell1-0/+4 2025-09-19dt-bindings: clock: mediatek: Add power-domains propertyJulien Massot1-0/+15 2025-09-19clk: keystone: sci-clk: use devm_kmemdup_array()Raag Jadav1-4/+1 2025-09-19clk: ti: am33xx: keep WKUP_DEBUGSS_CLKCTRL enabledMatthias Schiffer1-0/+2 2025-09-19clk: amlogic: fix recent code refactoringMarek Szyprowski1-1/+1 2025-09-16dt-bindings: clock: silabs,si5341: Add missing propertiesRob Herring (Arm)1-0/+6 2025-09-14clk: tegra: dfll: Add CVB tables for Tegra114Svyatoslav Ryhel2-28/+132 2025-09-13clk: sunxi-ng: add support for the A523/T527 MCU CCUChen-Yu Tsai3-0/+476 2025-09-13clk: sunxi-ng: div: support power-of-two dividersChen-Yu Tsai1-0/+18 2025-09-13clk: sunxi-ng: sun55i-a523-ccu: Add missing NPU module clockChen-Yu Tsai2-17/+18 2025-09-13dt-bindings: clock: sun55i-a523-ccu: Add A523 MCU CCU clock controllerChen-Yu Tsai3-2/+119 2025-09-13dt-bindings: clock: sun55i-a523-ccu: Add missing NPU module clockChen-Yu Tsai1-0/+1 2025-09-12clk: imx95-blk-ctl: Save/restore registers when RPM routines are calledLaurentiu Palcu1-12/+21 2025-09-12clk: imx95-blk-ctl: Save platform data in imx95_blk_ctl structureLaurentiu Palcu1-23/+13 2025-09-12clk: renesas: r9a09g05[67]: Reduce differencesGeert Uytterhoeven2-6/+5 2025-09-12clk: renesas: r9a09g047: Add USB3.0 clocks/resetsBiju Das1-1/+8 2025-09-12clk: renesas: cpg-mssr: Fix memory leak in cpg_mssr_reserved_init()Yuan CHen1-2/+5 2025-09-12clk: sunxi-ng: sun6i-rtc: Add A523 specificsChen-Yu Tsai1-0/+11 2025-09-11clk: renesas: r9a09g056: Add clock and reset entries for I3CLad Prabhakar1-0/+8 2025-09-11clk: renesas: r9a09g057: Add clock and reset entries for I3CLad Prabhakar1-0/+8 2025-09-11dt-bindings: clock: renesas,r9a09g047-cpg: Add USB3.0 core clocksBiju Das1-0/+2 2025-09-11clk: tegra: Add DFLL DVCO reset control for Tegra114Svyatoslav Ryhel2-6/+26 2025-09-11dt-bindings: arm: tegra: Add ASUS TF101G and SL101Svyatoslav Ryhel1-2/+6