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2018-09-13drm/i915: Fix a potential integer overflow with framebuffers extending past 4...Ville Syrjälä-3/+3
2018-09-13drm/i915: Replace some PAGE_SIZE with I915_GTT_PAGE_SIZEVille Syrjälä-10/+10
2018-09-13i915/oa: Simplify updating contextsTvrtko Ursulin-109/+13
2018-09-12drm/i915: Extract intel_cursor_check_surface()Ville Syrjälä-18/+29
2018-09-12drm/i915: Move chv rotation checks to plane->check()Ville Syrjälä-9/+26
2018-09-12drm/i915: Move display w/a #1175Ville Syrjälä-34/+41
2018-09-12drm/i915: Move skl plane fb related checks into a better placeVille Syrjälä-56/+66
2018-09-12drm/i915: Extract per-platform plane->check() functionsVille Syrjälä-184/+243
2018-09-12drm/i915: Nuke plane->can_scale/min_downscaleVille Syrjälä-35/+13
2018-09-12drm/i915: s/int plane/int color_plane/Ville Syrjälä-52/+56
2018-09-12drm/i915: Store ggtt_view in plane_stateVille Syrjälä-10/+15
2018-09-12drm/i915: Store the final plane stride in plane_stateVille Syrjälä-23/+46
2018-09-12drm/i915: Rename the plane_state->main/aux to plane_state->color_plane[]Ville Syrjälä-49/+46
2018-09-12drm/i915: Use pipe A primary plane .max_stride() as the global stride limitVille Syrjälä-23/+10
2018-09-12drm/i915: Add .max_stride() plane hookVille Syrjälä-2/+90
2018-09-12drm/i915: s/tile_offset/aligned_offset/ etc.Ville Syrjälä-62/+63
2018-09-12drm/i915: Reorder execobject[] to insert non-48b objects into the low 4GChris Wilson-0/+5
2018-09-12drm/i915/ringbuffer: Reload PDs harder on byt/bcsChris Wilson-3/+20
2018-09-11drm/i915: Nuke struct_mutex from context_setparamChris Wilson-28/+27
2018-09-11drm/i915/icl: Define T_INIT_MASTER registersMadhav Chauhan-0/+6
2018-09-11drm/i915/overlay: Use the ioctl parameters directlyChris Wilson-93/+54
2018-09-11drm/i915/overlay: Allocate physical registers from stolenChris Wilson-153/+75
2018-09-11drm/i915/chv: Update csc coefficient matrix during modesetP Raviraj Sitaram-0/+2
2018-09-10drm/i915/guc: Update GuC power domain statesMichal Wajdeczko-0/+4
2018-09-07drm/i915: Missed interrupt simulation is no more, tell the worldChris Wilson-0/+11
2018-09-06drm/i915: Update DRIVER_DATE to 20180906Joonas Lahtinen-1/+1
2018-09-06Merge tag 'gvt-next-2018-09-04' of https://github.com/intel/gvt-linux into dr...Joonas Lahtinen-53/+92
2018-09-06drm/i915: Update DRIVER_DATE to 20180906Joonas Lahtinen-1/+1
2018-09-06drm/i915: Update DRIVER_DATE to 20180906Joonas Lahtinen-2/+2
2018-09-05drm/i915: Move final cleanup of drm_i915_private to i915_driver_destroyChris Wilson-6/+13
2018-09-05drm/i915: Attach the pci match data to the device upon creationChris Wilson-28/+38
2018-09-05drm/i915/bdw: Increase IPS disable timeout to 100msImre Deak-2/+6
2018-09-05drm/i915: Reduce context HW ID lifetimeChris Wilson-70/+201
2018-09-04drm/i915: Be defensive and don't assume PSR has any commit to sync againstChris Wilson-6/+10
2018-09-04drm/i915: Pull intel_uncore_arm_unclaimed_mmio_detection() under the spinlockChris Wilson-3/+10
2018-09-04drm/i915/icl: Fix context RPCS programmingTvrtko Ursulin-13/+76
2018-09-04drm/i915/ringbuffer: Move double invalidate to after pd flushChris Wilson-18/+22
2018-09-04drm/i915: Double check we didn't miss an unclaimed register accessChris Wilson-6/+7
2018-09-04drm/i915: Fix ICL+ HDMI clock readoutVille Syrjälä-9/+17
2018-09-03drm/i915: Use a cached mapping for the physical HWSChris Wilson-15/+18
2018-09-03drm/i915: Combine cleanup_status_page()Chris Wilson-14/+6
2018-09-03drm/i915: Fix up FORCE_GPU_RELOC (debug) to flush CPU write domainsChris Wilson-0/+7
2018-09-03drm/i915: Update DRIVER_DATE to 20180903Joonas Lahtinen-2/+2
2018-09-03drm/i915: Forcibly flush unwanted requests in drop-cachesChris Wilson-16/+36
2018-09-03drm/i915: Early rejection of buffer allocations larger than RAMChris Wilson-6/+19
2018-09-03drm/i915: Force the slow path after a user-write errorChris Wilson-4/+5
2018-09-03drm/i915: Flag any possible writes for a GTT faultChris Wilson-1/+1
2018-09-03drm/i915: Do a full device reset after being wedgedChris Wilson-1/+2
2018-09-03drm/i915: Determine uses-full-ppgtt from context for execbufChris Wilson-3/+6
2018-09-01drm/i915: Explicitly mark Global GTT address spacesTvrtko Ursulin-1/+8
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