summaryrefslogtreecommitdiffstats
path: root/drivers/pci/controller
AgeCommit message (Expand)AuthorLines
2019-07-12Merge branch 'remotes/lorenzo/pci/qcom'Bjorn Helgaas-61/+54
2019-07-12Merge branch 'remotes/lorenzo/pci/mobiveil'Bjorn Helgaas-213/+312
2019-07-12Merge branch 'remotes/lorenzo/pci/hv'Bjorn Helgaas-6/+9
2019-07-12Merge branch 'remotes/lorenzo/pci/dwc'Bjorn Helgaas-35/+80
2019-07-12Merge branch 'remotes/lorenzo/pci/armada'Bjorn Helgaas-1/+81
2019-07-09PCI: dwc: pci-dra7xx: Fix compilation when !CONFIG_GPIOLIBYueHaibing-0/+1
2019-07-09PCI: Fix typos and whitespace errorsBjorn Helgaas-6/+6
2019-07-08PCI: mobiveil: Fix INTx interrupt clearing in mobiveil_pcie_isr()Hou Zhiqiang-3/+2
2019-07-08PCI: mobiveil: Fix infinite-loop in the INTx handling functionHou Zhiqiang-3/+9
2019-07-08PCI: mobiveil: Move PCIe PIO enablement out of inbound window routineHou Zhiqiang-4/+5
2019-07-08PCI: mobiveil: Add upper 32-bit PCI base address setup in inbound windowHou Zhiqiang-3/+6
2019-07-08PCI: mobiveil: Add upper 32-bit CPU base address setup in outbound windowHou Zhiqiang-1/+4
2019-07-08PCI: mobiveil: Mask out hardcoded bits in inbound/outbound windows setupHou Zhiqiang-2/+2
2019-07-08PCI: mobiveil: Clear the control fields before updating itHou Zhiqiang-5/+12
2019-07-08PCI: mobiveil: Add configured inbound windows counterHou Zhiqiang-0/+1
2019-07-08PCI: mobiveil: Fix the valid check for inbound and outbound windowsHou Zhiqiang-2/+2
2019-07-08PCI: mobiveil: Clean-up program_{ib/ob}_windows()Hou Zhiqiang-17/+8
2019-07-08PCI: mobiveil: Remove an unnecessary return value checkHou Zhiqiang-2/+0
2019-07-08PCI: mobiveil: Fix error return valuesHou Zhiqiang-3/+3
2019-07-08PCI: mobiveil: Refactor the MEM/IO outbound window initializationHou Zhiqiang-10/+10
2019-07-08PCI: mobiveil: Make some register updates more readableHou Zhiqiang-18/+25
2019-07-08PCI: mobiveil: Reformat the code for readabilityHou Zhiqiang-101/+107
2019-07-08PCI: mobiveil: Fix devfn check in mobiveil_pcie_valid_device()Hou Zhiqiang-1/+1
2019-07-08PCI: mobiveil: Initialize Primary/Secondary/Subordinate bus numbersHou Zhiqiang-0/+6
2019-07-08PCI: mobiveil: Move IRQ chained handler setup out of DT parseHou Zhiqiang-2/+2
2019-07-08PCI: mobiveil: Move the link up waiting out of mobiveil_host_init()Hou Zhiqiang-8/+7
2019-07-08PCI: mobiveil: Fix the Class Code fieldHou Zhiqiang-3/+6
2019-07-08PCI: mobiveil: Use the 1st inbound window for MEM inbound transactionsHou Zhiqiang-1/+1
2019-07-08PCI: mobiveil: Use WIN_NUM_0 explicitly for CFG outbound windowHou Zhiqiang-3/+2
2019-07-08PCI: mobiveil: Update the resource list traversal functionHou Zhiqiang-2/+2
2019-07-08PCI: mobiveil: Fix PCI base address in MEM/IO outbound windowsHou Zhiqiang-2/+3
2019-07-08PCI: mobiveil: Remove the flag MSI_FLAG_MULTI_PCI_MSIHou Zhiqiang-1/+1
2019-07-08PCI: mobiveil: Unify register accessorsHou Zhiqiang-55/+124
2019-07-05PCI: imx6: Simplify Kconfig depends onLeonard Crestez-1/+1
2019-07-05PCI: hv: Fix a use-after-free bug in hv_eject_device_work()Dexuan Cui-6/+9
2019-07-05PCI: tegra: Enable Relaxed Ordering only for Tegra20 & Tegra30Vidya Sagar-2/+5
2019-07-05PCI: tegra: Change link retry log level to debugManikanta Maddireddy-1/+1
2019-07-05PCI: tegra: Add support for GPIO based PERST#Manikanta Maddireddy-6/+43
2019-06-27PCI: dwc: Export APIs to support .remove() implementationVidya Sagar-0/+8
2019-06-27PCI: dwc: Cleanup DBI,ATU read and write APIsVidya Sagar-34/+57
2019-06-27PCI: dwc: Add API support to de-initialize hostVidya Sagar-0/+13
2019-06-26PCI: xilinx-nwl: Fix Multi MSI data programmingBharat Kumar Gogada-6/+5
2019-06-20PCI: tegra: Put PEX CLK & BIAS pads in DPD modeManikanta Maddireddy-1/+12
2019-06-20PCI: tegra: Add AFI_PEX2_CTRL reg offset as part of SoC structManikanta Maddireddy-2/+5
2019-06-20PCI: tegra: Change PRSNT_SENSE IRQ log to debugManikanta Maddireddy-1/+1
2019-06-20PCI: tegra: Program AFI_CACHE_BAR_{0,1}_{ST,SZ} registers only for Tegra20Manikanta Maddireddy-5/+13
2019-06-20PCI: tegra: Fix PLLE power down issue due to CLKREQ# signalManikanta Maddireddy-1/+12
2019-06-20PCI: tegra: Set target speed as Gen1 before starting LTSSMManikanta Maddireddy-0/+11
2019-06-20PCI: tegra: Update flow control timer frequency in Tegra210Manikanta Maddireddy-0/+15
2019-06-20PCI: tegra: Add SW fixup for RAW violationsManikanta Maddireddy-0/+34
generated by cgit v1.2.3 (git 2.46.0) at 2026-07-22 14:35:30 +0000