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2026-02-04spi: geni-qcom: Improve target mode allocation by using proper allocation ↵Praveen Talari-4/+5
functions The current implementation always allocates a host controller and sets the target flag later when the "spi-slave" device tree property is present. This approach is suboptimal as it doesn't utilize the dedicated allocation functions designed for target mode. Use devm_spi_alloc_target() when "spi-slave" device tree property is present, otherwise use devm_spi_alloc_host(). This replaces the previous approach of always allocating a host controller and setting target flag later. Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://patch.msgid.link/20260204162854.1206323-2-praveen.talari@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-04dmaengine: fsl-edma: don't explicitly disable clocks in .remove()Jared Kangas-1/+0
The clocks in fsl_edma_engine::muxclk are allocated and enabled with devm_clk_get_enabled(), which automatically cleans these resources up, but these clocks are also manually disabled in fsl_edma_remove(). This causes warnings on driver removal for each clock: edma_module already disabled WARNING: CPU: 0 PID: 418 at drivers/clk/clk.c:1200 clk_core_disable+0x198/0x1c8 [...] Call trace: clk_core_disable+0x198/0x1c8 (P) clk_disable+0x34/0x58 fsl_edma_remove+0x74/0xe8 [fsl_edma] [...] ---[ end trace 0000000000000000 ]--- edma_module already unprepared WARNING: CPU: 0 PID: 418 at drivers/clk/clk.c:1059 clk_core_unprepare+0x1f8/0x220 [...] Call trace: clk_core_unprepare+0x1f8/0x220 (P) clk_unprepare+0x34/0x58 fsl_edma_remove+0x7c/0xe8 [fsl_edma] [...] ---[ end trace 0000000000000000 ]--- Fix these warnings by removing the unnecessary fsl_disable_clocks() call in fsl_edma_remove(). Fixes: a9903de3aa16 ("dmaengine: fsl-edma: refactor using devm_clk_get_enabled") Signed-off-by: Jared Kangas <jkangas@redhat.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260113-fsl-edma-clock-removal-v1-1-2025b49e7bcc@redhat.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-02-04Merge tag 'soc-fixes-6.19-3' of ↵Linus Torvalds-2/+3
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC fixes from Arnd Bergmann: "Shawn Guo is moving on from maintaining the NXP i.MX platform and hands over to Frank Li. Shawn has maintained the platform for 15 years after initially upstreaming support for i.MX6 and i.MX23/28, and his work has helped make this the most important industrial embedded Linux platform. Roughly one out of five devicetree files in mainline kernels are for the wider i.MX platform. Many thanks to Shawn for the taking care of the platform all these years! There are also two additional updates for the MAINTAINERS file, and a fix for error handling in the qualcomm smem driver" * tag 'soc-fixes-6.19-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: MAINTAINERS: Change Sudeep Holla's email address MAINTAINERS: Add myself as maintainer of hisi_soc_hha soc: qcom: smem: fix qcom_smem_is_available and check if __smem is valid MAINTAINERS: Replace Shawn with Frank as i.MX platform maintainer
2026-02-04cxl: Disable HPA/SPA translation handlers for Normalized AddressingRobert Richter-9/+36
The root decoder provides the callbacks hpa_to_spa and spa_to_hpa to perform Host Physical Address (HPA) and System Physical Address translations, respectively. The callbacks are required to convert addresses when HPA != SPA. XOR interleaving depends on this mechanism, and the necessary handlers are implemented. The translation handlers are used for poison injection (trace_cxl_poison, cxl_poison_inject_fops) and error handling (cxl_event_trace_record). In AMD Zen5 systems with Normalized Addressing, endpoint addresses are not SPAs, and translation handlers are required for these features to function correctly. Now, as ACPI PRM translation could be expensive in tracing or error handling code paths, do not yet enable translations to avoid its intensive use. Instead, disable those features which are used only for debugging and enhanced logging. Introduce the flag CXL_REGION_F_NORMALIZED_ADDRESSING that indicates Normalized Addressing for a region and use it to disable poison injection and DPA to HPA conversion. Note: Dropped unused CXL_DECODER_F_MASK macro. [dj: Fix commit log CXL_REGION_F_NORM_ADDR to CXL_REGION_F_NORMALIZED_ADDRESSING ] Reviewed-by: Alison Schofield <alison.schofield@intel.com> Signed-off-by: Robert Richter <rrichter@amd.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://patch.msgid.link/20260114164837.1076338-14-rrichter@amd.com Signed-off-by: Dave Jiang <dave.jiang@intel.com>
2026-02-04cxl/region: Factor out code into cxl_region_setup_poison()Robert Richter-25/+28
Poison injection setup code is embedded in cxl_region_probe(). For improved encapsulation, readability, and maintainability, factor out code into function cxl_region_setup_poison(). This patch is a prerequisite to disable poison by region offset for Normalized Addressing. No functional changes. Reviewed-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Alison Schofield <alison.schofield@intel.com> Signed-off-by: Robert Richter <rrichter@amd.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Link: https://patch.msgid.link/20260114164837.1076338-13-rrichter@amd.com Signed-off-by: Dave Jiang <dave.jiang@intel.com>
2026-02-04cxl/atl: Lock decoders that need address translationRobert Richter-0/+18
The current kernel implementation does not support endpoint setup with Normalized Addressing. It only translates an endpoint's DPA to the SPA range of the host bridge. Therefore, the endpoint address range cannot be determined, making a non-auto setup impossible. If a decoder requires address translation, reprogramming should be disabled and the decoder locked. The BIOS, however, provides all the necessary address translation data, which the kernel can use to reconfigure endpoint decoders with normalized addresses. Locking the decoders in the BIOS would prevent a capable kernel (or other operating systems) from shutting down auto-generated regions and managing resources dynamically. Reviewed-by: Gregory Price <gourry@gourry.net> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Tested-by: Gregory Price <gourry@gourry.net> Signed-off-by: Robert Richter <rrichter@amd.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com>> --- Link: https://patch.msgid.link/20260114164837.1076338-12-rrichter@amd.com Signed-off-by: Dave Jiang <dave.jiang@intel.com>
2026-02-04cxl: Enable AMD Zen5 address translation using ACPI PRMTRobert Richter-0/+205
Add AMD Zen5 support for address translation. Zen5 systems may be configured to use 'Normalized addresses'. Then, host physical addresses (HPA) are different from their system physical addresses (SPA). The endpoint has its own physical address space and an incoming HPA is already converted to the device's physical address (DPA). Thus it has interleaving disabled and CXL endpoints are programmed passthrough (DPA == HPA). Host Physical Addresses (HPAs) need to be translated from the endpoint to its CXL host bridge, esp. to identify the endpoint's root decoder and region's address range. ACPI Platform Runtime Mechanism (PRM) provides a handler to translate the DPA to its SPA. This is documented in: AMD Family 1Ah Models 00h–0Fh and Models 10h–1Fh ACPI v6.5 Porting Guide, Publication # 58088 https://www.amd.com/en/search/documentation/hub.html With Normalized Addressing this PRM handler must be used to translate an HPA of an endpoint to its SPA. Do the following to implement AMD Zen5 address translation: Introduce a new file core/atl.c to handle ACPI PRM specific address translation code. Naming is loosely related to the kernel's AMD Address Translation Library (CONFIG_AMD_ATL) but implementation does not depend on it, nor it is vendor specific. Use Kbuild and Kconfig options respectively to enable the code depending on architecture and platform options. AMD Zen5 systems support the ACPI PRM CXL Address Translation firmware call (see ACPI v6.5 Porting Guide, Address Translation - CXL DPA to System Physical Address). Firmware enables the PRM handler if the platform has address translation implemented. Check firmware and kernel support of ACPI PRM using the specific GUID. On success enable address translation by setting up the earlier introduced root port callback, see function cxl_prm_setup_translation(). Setup is done in cxl_setup_prm_address_translation(), it is the only function that needs to be exported. For low level PRM firmware calls, use the ACPI framework. Identify the region's interleaving ways by inspecting the address ranges. Also determine the interleaving granularity using the address translation callback. Note that the position of the chunk from one interleaving block to the next may vary and thus cannot be considered constant. Address offsets larger than the interleaving block size cannot be used to calculate the granularity. Thus, probe the granularity using address translation for various HPAs in the same interleaving block. [ dj: Add atl.o build to cxl_test ] Reviewed-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Tested-by: Gregory Price <gourry@gourry.net> Signed-off-by: Robert Richter <rrichter@amd.com> Link: https://patch.msgid.link/20260114164837.1076338-11-rrichter@amd.com Signed-off-by: Dave Jiang <dave.jiang@intel.com>
2026-02-04drm/xe/pm: Disable D3Cold for BMG only on specific platformsKarthik Poosa-3/+10
Restrict D3Cold disablement for BMG to unsupported NUC platforms, instead of disabling it on all platforms. Signed-off-by: Karthik Poosa <karthik.poosa@intel.com> Fixes: 3e331a6715ee ("drm/xe/pm: Temporarily disable D3Cold on BMG") Link: https://patch.msgid.link/20260123173238.1642383-1-karthik.poosa@intel.com Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> (cherry picked from commit 39125eaf8863ab09d70c4b493f58639b08d5a897) Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
2026-02-04drm/xe: Fix kerneldoc for xe_tlb_inval_job_alloc_depShuicheng Lin-1/+1
Correct the function name in the kerneldoc. It is for below warning: "Warning: drivers/gpu/drm/xe/xe_tlb_inval_job.c:210 expecting prototype for xe_tlb_inval_alloc_dep(). Prototype was for xe_tlb_inval_job_alloc_dep() instead" Fixes: 15366239e2130 ("drm/xe: Decouple TLB invalidations from GT") Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Shuicheng Lin <shuicheng.lin@intel.com> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Link: https://patch.msgid.link/20260129233834.419977-8-shuicheng.lin@intel.com (cherry picked from commit 9f9c117ac566cb567dd56cc5b7564c45653f7a2a) Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
2026-02-04drm/xe: Fix kerneldoc for xe_gt_tlb_inval_init_earlyShuicheng Lin-1/+1
Correct the function name in the kerneldoc. It is for below warning: "Warning: drivers/gpu/drm/xe/xe_tlb_inval.c:136 expecting prototype for xe_gt_tlb_inval_init(). Prototype was for xe_gt_tlb_inval_init_early() instead" v2: add () for the function. (Michal) Fixes: db16f9d90c1d9 ("drm/xe: Split TLB invalidation code in frontend and backend") Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Shuicheng Lin <shuicheng.lin@intel.com> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Link: https://patch.msgid.link/20260129233834.419977-7-shuicheng.lin@intel.com (cherry picked from commit 0651dbb9d6a72e99569576fbec4681fd8160d161) Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
2026-02-04drm/xe: Fix kerneldoc for xe_migrate_exec_queueShuicheng Lin-1/+1
Correct the function name in the kerneldoc. It is for below warning: "Warning: drivers/gpu/drm/xe/xe_migrate.c:1262 expecting prototype for xe_get_migrate_exec_queue(). Prototype was for xe_migrate_exec_queue() instead" Fixes: 916ee4704a865 ("drm/xe/vf: Register CCS read/write contexts with Guc") Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Shuicheng Lin <shuicheng.lin@intel.com> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Link: https://patch.msgid.link/20260129233834.419977-6-shuicheng.lin@intel.com (cherry picked from commit 9fd8da717934f05125b9ba6782622c459a368dc0) Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
2026-02-04drm/xe/query: Fix topology query pointer advanceShuicheng Lin-1/+1
The topology query helper advanced the user pointer by the size of the pointer, not the size of the structure. This can misalign the output blob and corrupt the following mask. Fix the increment to use sizeof(*topo). There is no issue currently, as sizeof(*topo) happens to be equal to sizeof(topo) on 64-bit systems (both evaluate to 8 bytes). Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs") Signed-off-by: Shuicheng Lin <shuicheng.lin@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patch.msgid.link/20260130043907.465128-2-shuicheng.lin@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com> (cherry picked from commit c2a6859138e7f73ad904be17dd7d1da6cc7f06b3) Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
2026-02-04phy: ti: phy-j721e-wiz: convert from divider_round_rate() to ↵Brian Masney-4/+1
divider_determine_rate() The divider_round_rate() function is now deprecated, so let's migrate to divider_determine_rate() instead so that this deprecated API can be removed. Note that when the main function itself was migrated to use determine_rate, this was mistakenly converted to: req->rate = divider_round_rate(...) This is invalid in the case when an error occurs since it can set the rate to a negative value. Fixes: 27287e3b52b5 ("phy: ti: phy-j721e-wiz: convert from round_rate() to determine_rate()") Signed-off-by: Brian Masney <bmasney@redhat.com> Link: https://patch.msgid.link/20260108-clk-divider-round-rate-v1-25-535a3ed73bf3@redhat.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-02-04phy: tegra: xusb: Remove unused powered_on variableJon Hunter-1/+0
Commit bbf711682cd5 ("phy: tegra: xusb: Add Tegra186 support") added the variable 'powered_on' to the structure 'tegra_xusb_usb2_lane' but it has never been used. Therefore, remove this unused variable. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Link: https://patch.msgid.link/20260202153314.1634145-1-jonathanh@nvidia.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-02-04phy: renesas: rcar-gen3-usb2: add regulator dependencyArnd Bergmann-0/+1
The driver start registering a regulator, but can still be enabled even when it is unable to call into the regulator subsystem: aarch64-linux-ld: drivers/phy/renesas/phy-rcar-gen3-usb2.o: in function `rcar_gen3_phy_usb2_probe': phy-rcar-gen3-usb2.c:(.text+0x2884): undefined reference to `devm_regulator_register' Add a Kconfig dependency to avoid this configuration. Fixes: b6d7dd157763 ("phy: renesas: rcar-gen3-usb2: Add regulator for OTG VBUS control") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://patch.msgid.link/20260202095118.1233046-1-arnd@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-02-04phy: GOOGLE_USB: add TYPEC dependencyArnd Bergmann-0/+1
With CONFIG_TYPEC=m, this driver cannot be built-in: arm-linux-gnueabi/bin/arm-linux-gnueabi-ld: drivers/phy/phy-google-usb.o: in function `google_usb_phy_remove': phy-google-usb.c:(.text+0x24): undefined reference to `typec_switch_unregister' Add CONFIG_TYPEC as a hard dependency here to force a clean build. In theory, compile-testing with CONFIG_TYPEC=n would also work, but that seems pointless. Fixes: cbce66669c82 ("phy: Add Google Tensor SoC USB PHY driver") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20260202095655.1289973-1-arnd@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-02-04phy: enter drivers/phy/Makefile even without CONFIG_GENERIC_PHYVladimir Oltean-2/+2
Kconfig option CONFIG_PHY_COMMON_PROPS, which builds drivers/phy/phy-common-props.c, was intended to be selectable independently of CONFIG_GENERIC_PHY. Yet it lives in drivers/phy/, which is entered by the Makefile only if CONFIG_GENERIC_PHY is set. Allow the Makefile to enter one level deeper, but stop at drivers/phy/ if CONFIG_GENERIC_PHY is unselected (i.e. do not enter vendor folders). The other stuff from drivers/phy/Makefile except for CONFIG_PHY_COMMON_PROPS, like CONFIG_PHY_NXP_PTN3222, all depends on CONFIG_GENERIC_PHY. Fixes: e7556b59ba65 ("phy: add phy_get_rx_polarity() and phy_get_tx_polarity()") Closes: https://lore.kernel.org/lkml/43ea0202-891d-4582-980b-5cb557b41114@linux.ibm.com/ Reported-by: Venkat Rao Bagalkote <venkat88@linux.ibm.com> Debugged-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org> Tested-by: Venkat Rao Bagalkote <venkat88@linux.ibm.com> Link: https://patch.msgid.link/20260123110600.3118561-1-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-02-04irqchip/gic-v5: Fix spelling mistake "ouside" -> "outside"Colin Ian King-1/+1
There is a spelling mistake in a pr_err message. Fix it. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Acked-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Link: https://patch.msgid.link/20260203210735.5036-1-colin.i.king@gmail.com
2026-02-04regulator: s2mps11: more descriptive gpio consumer nameAndré Draszik-1/+2
Currently, GPIOs claimed by this driver for external rail control all show up with "s2mps11-regulator" as consumer, which is not very informative. Switch to using the regulator name via desc->name instead, using the device name as fallback. Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20260122-s2mpg1x-regulators-v7-20-3b1f9831fffd@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-04regulator: s2mps11: add S2MPG11 regulatorAndré Draszik-1/+301
The S2MPG11 PMIC is a Power Management IC for mobile applications with buck converters, various LDOs, power meters, and additional GPIO interfaces. It typically complements an S2MPG10 PMIC in a main/sub configuration as the sub-PMIC. It has 12 buck, 1 buck-boost, and 15 LDO rails. Several of these can either be controlled via software (register writes) or via external signals, in particular by: * input pins connected to a main processor's: * GPIO pins * other pins that are e.g. firmware- or power-domain-controlled without explicit driver intervention * a combination of input pins and register writes. Control via input pins allows PMIC rails to be controlled by firmware, e.g. during standby/suspend or as part of power domain handling where otherwise that would not be possible. Additionally toggling a pin is faster than register writes, and it also allows the PMIC to ensure that any necessary timing requirements between rails are respected automatically if multiple rails are to be enabled or disabled quasi simultaneously. This commit implements support for all these rails and control combination. Note1: For an externally controlled rail, the regulator_ops provide an empty ::enable() and no ::disable() implementations, even though Linux can not enable the rail and one might think ::enable could be NULL. Without ops->enable(), the regulator core will assume enabling such a rail failed, though, and in turn never add a reference to its parent (supplier) rail. Once a different (Linux-controlled) sibling (consumer) rail on that same parent rail gets disabled, the parent gets disabled (cutting power to the externally controlled rail although it should stay on), and the system will misbehave. Note2: While external control via input pins appears to exist on other versions of this PMIC, there is more flexibility in this version, in particular there is a selection of input pins to choose from for each rail (which must therefore be configured accordingly if in use), whereas other versions don't have this flexibility. Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20260122-s2mpg1x-regulators-v7-19-3b1f9831fffd@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-04regulator: s2mps11: refactor S2MPG10 regulator macros for S2MPG11 reuseAndré Draszik-27/+42
Rails in the S2MPG11 share a very similar set of properties with S2MPG10 with slight differences. Update the existing macros to allow reuse by the upcoming S2MPG11 driver. Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20260122-s2mpg1x-regulators-v7-18-3b1f9831fffd@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-04regulator: s2mps11: refactor S2MPG10 ::set_voltage_time() for S2MPG11 reuseAndré Draszik-10/+22
The upcoming S2MPG11 support needs a similar, but different version of ::set_voltage_time(). For S2MPG10, the downwards and upwards ramps for a rail are at different offsets at the same bit positions, while for S2MPG11 the ramps are at the same offset at different bit positions. Refactor the existing version slightly to allow reuse. Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20260122-s2mpg1x-regulators-v7-17-3b1f9831fffd@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-04regulator: s2mps11: add S2MPG10 regulatorAndré Draszik-3/+584
The S2MPG10 PMIC is a Power Management IC for mobile applications with buck converters, various LDOs, power meters, RTC, clock outputs, and additional GPIO interfaces. It has 10 buck and 31 LDO rails. Several of these can either be controlled via software (register writes) or via external signals, in particular by: * one out of several input pins connected to a main processor's: * GPIO pins * other pins that are e.g. firmware- or power-domain-controlled without explicit driver intervention * a combination of input pins and register writes. Control via input pins allows PMIC rails to be controlled by firmware, e.g. during standby/suspend, or as part of power domain handling where otherwise that would not be possible. Additionally toggling a pin is faster than register writes, and it also allows the PMIC to ensure that any necessary timing requirements between rails are respected automatically if multiple rails are to be enabled or disabled quasi simultaneously. This commit implements support for all these rails and control combinations. Additional data needs to be stored for each regulator, e.g. the input pin for external control, or a rail-specific ramp-rate for when enabling a buck-rail. Therefore, probe() is updated slightly to make that possible. Note1: For an externally controlled rail, the regulator_ops provide an empty ::enable() and no ::disable() implementations, even though Linux can not enable the rail and one might think ::enable could be NULL. Without ops->enable(), the regulator core will assume enabling such a rail failed, though, and in turn never add a reference to its parent (supplier) rail. Once a different (Linux-controlled) sibling (consumer) rail on that same parent rail gets disabled, the parent gets disabled (cutting power to the externally controlled rail although it should stay on), and the system will misbehave. Note2: While external control via input pins appears to exist on other versions of this PMIC, there is more flexibility in this version, in particular there is a selection of input pins to choose from for each rail (which must therefore be configured accordingly if in use), whereas other versions don't have this flexibility. Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20260122-s2mpg1x-regulators-v7-16-3b1f9831fffd@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-04regulator: s2mps11: refactor handling of external rail controlAndré Draszik-33/+67
Refactor s2mps14_pmic_enable_ext_control() and s2mps11_of_parse_cb() slightly as a preparation for adding S2MPG10 and S2MPG11 support, as both of those PMICs also support control of rails via GPIOs. This also includes the following to avoid further updates in follow-up commits: * On S2MPG10 and S2MPG11, external rail control can be via GPIO or via non-GPIO signals, hence passing a GPIO is allowed to be optional. This avoids inappropriate verbose driver messages. * Prepare to allow use of standard DT property name 'enable-gpios' for newer platforms instead of vendor-specific 'samsung,ext-control'. Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20260122-s2mpg1x-regulators-v7-15-3b1f9831fffd@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-04regulator: s2mps11: update node parsing (allow -supply properties)André Draszik-87/+105
For the upcoming S2MPG10 and S2MPG11 support, we need to be able to parse -supply properties in the PMIC's DT node. This currently doesn't work, because the code here currently points the regulator core at each individual regulator sub-node, and therefore the regulator core is unable to find the -supply properties. Update the code to simply let the regulator core handle all the parsing by adding the ::of_match and ::regulators_node members to all existing regulator descriptions, by adding ::of_parse_cb() to those regulators which support the vendor-specific samsung,ext-control-gpios to parse it (S2MPS14), and by dropping the explicit call to of_regulator_match(). Configuring the PMIC to respect the external control GPIOs via s2mps14_pmic_enable_ext_control() is left outside ::of_parse_cb() because the regulator core ignores errors other than -EPROBE_DEFER from that callback, while the code currently fails probe on register write errors and I believe it should stay that way. The driver can now avoid the devm_gpiod_unhinge() dance due to simpler error handling of GPIO descriptor acquisition. This change also has the advantage of reducing runtime memory consumption by quite a bit as the driver doesn't need to allocate a 'struct of_regulator_match' and a 'struct gpio_desc *' for each regulator for all PMICs as the regulator core does that. This saves 40+8 bytes on arm64 for each individual regulator on all supported PMICs (even on non-S2MPS14 due to currently unnecessarily allocating the extra memory unconditionally). With the upcoming S2MPG10 and S2MPG11 support, this amounts to 1640+328 and 1120+224 bytes respectively. Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20260122-s2mpg1x-regulators-v7-14-3b1f9831fffd@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-04regulator: s2mps11: place constants on right side of comparison testsAndré Draszik-6/+6
For the lines being changed, checkpatch reports: WARNING: Comparisons should place the constant on the right side of the test Update the code accordingly. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20260122-s2mpg1x-regulators-v7-13-3b1f9831fffd@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-04regulator: s2mps11: use dev_err_probe() where appropriateAndré Draszik-15/+14
dev_err_probe() exists to simplify code and harmonise error messages, there's no reason not to use it here. While at it, harmonise some error messages to add regulator name and ID like in other messages in this driver, and update messages to be more similar to other child-drivers of this PMIC (e.g. RTC). Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20260122-s2mpg1x-regulators-v7-12-3b1f9831fffd@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-04regulator: s2mps11: drop two needless variable initialisationsAndré Draszik-2/+2
The initialisations being removed are needless, as both variables are being assigned values unconditionally further down. Additionally, doing this eager init here might lead to preventing the compiler from issuing a warning if a future code change actually forgets to assign a useful value in some code path. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20260122-s2mpg1x-regulators-v7-11-3b1f9831fffd@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-04ata: pata_ftide010: Fix some DMA timingsLinus Walleij-3/+3
The FTIDE010 has been missing some timing settings since its inception, since the upstream OpenWrt patch was missing these. The community has since come up with the appropriate timings. Fixes: be4e456ed3a5 ("ata: Add driver for Faraday Technology FTIDE010") Cc: stable@vger.kernel.org Signed-off-by: Linus Walleij <linusw@kernel.org> Signed-off-by: Niklas Cassel <cassel@kernel.org>
2026-02-04mfd: cgbc: Add support for backlightPetri Karhula-0/+1
The Board Controller has control for display backlight. Add backlight cell for the cgbc-backlight driver which adds support for backlight brightness control. Signed-off-by: Petri Karhula <petri.karhula@novatron.fi> Reviewed-by: Thomas Richard <thomas.richard@bootlin.com> Link: https://patch.msgid.link/20251205-cgbc-backlight-v6-2-e4175b0bf406@novatron.fi Signed-off-by: Lee Jones <lee@kernel.org>
2026-02-04mfd: sec: Add support for S2MPG11 PMIC via ACPMAndré Draszik-6/+268
Add support for Samsung's S2MPG11 PMIC, which is a Power Management IC for mobile applications with buck converters, various LDOs, power meters, NTC thermistor inputs, and additional GPIO interfaces. It typically complements an S2MPG10 PMIC in a main/sub configuration as the sub-PMIC. Like S2MPG10, communication is not via I2C, but via the Samsung ACPM firmware. While at it, we can also switch to asynchronous probe, which helps with probe performance, as the drivers for s2mpg10 and s2mpg11 can probe in parallel. Note: The firmware uses the ACPM channel ID and the Speedy channel ID to select the PMIC address. Since these are firmware properties, they can not be retrieved from DT, but instead are deducted from the compatible for now. Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20260122-s2mpg1x-regulators-v7-9-3b1f9831fffd@linaro.org Signed-off-by: Lee Jones <lee@kernel.org>
2026-02-04power: sequencing: fix missing state_lock in pwrseq_power_on() error pathZiyi Guo-2/+4
pwrseq_power_on() calls pwrseq_unit_disable() when the post_enable callback fails. However, this call is outside the scoped_guard(mutex, &pwrseq->state_lock) block that ends. pwrseq_unit_disable() has lockdep_assert_held(&pwrseq->state_lock), which will fail when called from this error path. Add the scoped_guard block to cover the post_enable callback and its error handling to ensure the lock is held when pwrseq_unit_disable() is called. Signed-off-by: Ziyi Guo <n7l8m4@u.northwestern.edu> Link: https://patch.msgid.link/20260130182651.1576579-1-n7l8m4@u.northwestern.edu Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
2026-02-04backlight: qcom-wled: Change PM8950 WLED configurationsBarnabás Czémán-1/+2
PMI8950 WLED needs same configurations as PMI8994 WLED. Fixes: 10258bf4534b ("backlight: qcom-wled: Add PMI8950 compatible") Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Daniel Thompson (RISCstar) <danielt@kernel.org> Link: https://patch.msgid.link/20260116-pmi8950-wled-v3-4-e6c93de84079@mainlining.org Signed-off-by: Lee Jones <lee@kernel.org>
2026-02-04backlight: qcom-wled: Support ovp values for PMI8994Barnabás Czémán-2/+39
WLED4 found in PMI8994 supports different ovp values. Fixes: 6fc632d3e3e0 ("video: backlight: qcom-wled: Add PMI8994 compatible") Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Daniel Thompson (RISCstar) <danielt@kernel.org> Link: https://patch.msgid.link/20260116-pmi8950-wled-v3-2-e6c93de84079@mainlining.org Signed-off-by: Lee Jones <lee@kernel.org>
2026-02-04gpiolib: acpi: Fix gpio count with string referencesAlban Bedel-0/+1
Since commit 9880702d123f2 ("ACPI: property: Support using strings in reference properties") it is possible to use strings instead of local references. This work fine with single GPIO but not with arrays as acpi_gpio_package_count() didn't handle this case. Update it to handle strings like local references to cover this case as well. Signed-off-by: Alban Bedel <alban.bedel@lht.dlh.de> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://patch.msgid.link/20260129145944.3372777-1-alban.bedel@lht.dlh.de Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
2026-02-04irqchip/sifive-plic: Handle number of hardware interrupts correctlyThomas Gleixner-37/+45
The driver is handling the number of hardware interrupts inconsistently. The reason is that the firmware enumerates the maximum number of device interrupts, but the actual number of hardware interrupts is one more because hardware interrupt 0 is reserved. There are two loop variants where this matters: 1) Iterating over the device interrupts for (irq = 1; irq < total_irqs; irq++) 2) Iterating over the number of interrupt register groups for (grp = 0; grp < irq_groups; grp++) The current code stores the number of device interrupts and that requires to write the loops as: 1) for (irq = 1; irq <= device_irqs; irq++) 2) for (grp = 0; grp < DIV_ROUND_UP(device_irqs + 1); grp++) But the code gets it wrong all over the place. Just fixing up the conditions and off by ones is not a sustainable solution as the next changes will reintroduce the same bugs over and over. Sanitize it by storing the total number of hardware interrupts during probe and precalculating the number of groups. To future proof it mark priv::total_irqs __private, provide a correct iterator macro and adjust the code to this. Marking it private allows sparse (C=1 build) to catch direct access to this member: drivers/irqchip/irq-sifive-plic.c:270:9: warning: dereference of noderef expression That should prevent at least the most obvious future damage in that area. Fixes: e80f0b6a2cf3 ("irqchip/irq-sifive-plic: Add syscore callbacks for hibernation") Reported-by: Yangyu Chen <cyy@cyyself.name> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Tested-by: Yangyu Chen <cyy@cyyself.name> Link: https://patch.msgid.link/87ikcd36i9.ffs@tglx
2026-02-04leds: as3668: Driver for the ams Osram 4-channel i2c LED driverLukas Timmermann-0/+216
Since there were no existing drivers for the AS3668 or related devices, a new driver was introduced in a separate file. Similar devices were reviewed, but none shared enough characteristics to justify code reuse. As a result, this driver is written specifically for the AS3668. Signed-off-by: Lukas Timmermann <linux@timmermann.space> Link: https://patch.msgid.link/20260118165010.902086-3-linux@timmermann.space Signed-off-by: Lee Jones <lee@kernel.org>
2026-02-04leds: Add basic support for TI/National Semiconductor LP5812 LED DriverNam Tran-0/+828
The LP5812 is a 4x3 matrix RGB LED driver with an autonomous animation engine and time-cross-multiplexing (TCM) support for up to 12 LEDs or 4 RGB LEDs. Each LED can be configured through the related registers to realize vivid and fancy lighting effects. This patch adds minimal driver support for the LP5812, implementing only the essential functionality: I2C communication with the device, LED registration, brightness control in manual mode, and basic sysfs interfaces for LED configuration and fault monitoring. Signed-off-by: Nam Tran <trannamatk@gmail.com> Link: https://patch.msgid.link/20260115161013.40706-2-trannamatk@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
2026-02-04leds: qcom-lpg: Check the return value of regmap_bulk_write()Haotian Zhang-3/+5
The lpg_lut_store() function currently ignores the return value of regmap_bulk_write() and always returns 0. This can cause hardware write failures to go undetected, leading the caller to believe LUT programming succeeded when it may have failed. Check the return value of regmap_bulk_write() in lpg_lut_store and return the error to the caller on failure. Fixes: 24e2d05d1b68 ("leds: Add driver for Qualcomm LPG") Signed-off-by: Haotian Zhang <vulab@iscas.ac.cn> Link: https://patch.msgid.link/20260108175133.638-1-vulab@iscas.ac.cn Signed-off-by: Lee Jones <lee@kernel.org>
2026-02-04leds: lp55xx: Simplify with scoped for each OF child loopKrzysztof Kozlowski-5/+2
Use scoped for-each loop when iterating over device nodes to make code a bit simpler. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20251224124521.208635-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Lee Jones <lee@kernel.org>
2026-02-04leds: is31f132xx: Add support for is31fl3293Daniel Mack-8/+130
This chip supports 3 LED channels with 4096 possible PWM values. Extend the driver to support this variant: * Make brightness steps configurable per device type * Handle dual-register brightness updates * Allow to specify values to write into the PWM update register * Add custom init and shutdown function for 3293 variant * Init registers after parsing DT properties Signed-off-by: Daniel Mack <daniel@zonque.org> Link: https://patch.msgid.link/20251219154521.643312-4-daniel@zonque.org Signed-off-by: Lee Jones <lee@kernel.org>
2026-02-04leds: is31f132xx: Re-order code to remove forward declarationsDaniel Mack-66/+62
Move the chipdef structs after the functions they reference so that forward declarations become unnecessary. Signed-off-by: Daniel Mack <daniel@zonque.org> Link: https://patch.msgid.link/20251219154521.643312-3-daniel@zonque.org Signed-off-by: Lee Jones <lee@kernel.org>
2026-02-04leds: expresswire: Fix chip state breakageDuje Mihanović-7/+17
It is possible to put the KTD2801 chip in an unknown/undefined state by changing the brightness very rapidly (for example, with a brightness slider). When this happens, the brightness is stuck on max and cannot be changed until the chip is power cycled. Fix this by disabling interrupts while talking to the chip. While at it, make expresswire_power_off() use fsleep() and also unexport some functions meant to be internal. Fixes: 1368d06dd2c9 ("leds: Introduce ExpressWire library") Tested-by: Karel Balej <balejk@matfyz.cz> Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz> Link: https://patch.msgid.link/20251217-expresswire-fix-v2-1-4a02b10acd96@dujemihanovic.xyz Signed-off-by: Lee Jones <lee@kernel.org>
2026-02-04driver core: disable revocable code from buildGreg Kroah-Hartman-2/+2
The revocable code is still under active discussion, and there is no in-kernel users of it. So disable it from the build for now so that no one suffers from it being present in the tree, yet leave it in the source tree so that others can easily test it by reverting this commit and building off of it for future releases. Acked-by: Danilo Krummrich <dakr@kernel.org> Link: https://patch.msgid.link/2026020307-rimmed-dreamy-5a67@gregkh Reviewed-by: Tzung-Bi Shih <tzungbi@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-02-04drm/mgag200: fix mgag200_bmc_stop_scanout()Jacob Keller-19/+18
The mgag200_bmc_stop_scanout() function is called by the .atomic_disable() handler for the MGA G200 VGA BMC encoder. This function performs a few register writes to inform the BMC of an upcoming mode change, and then polls to wait until the BMC actually stops. The polling is implemented using a busy loop with udelay() and an iteration timeout of 300, resulting in the function blocking for 300 milliseconds. The function gets called ultimately by the output_poll_execute work thread for the DRM output change polling thread of the mgag200 driver: kworker/0:0-mm_ 3528 [000] 4555.315364: ffffffffaa0e25b3 delay_halt.part.0+0x33 ffffffffc03f6188 mgag200_bmc_stop_scanout+0x178 ffffffffc087ae7a disable_outputs+0x12a ffffffffc087c12a drm_atomic_helper_commit_tail+0x1a ffffffffc03fa7b6 mgag200_mode_config_helper_atomic_commit_tail+0x26 ffffffffc087c9c1 commit_tail+0x91 ffffffffc087d51b drm_atomic_helper_commit+0x11b ffffffffc0509694 drm_atomic_commit+0xa4 ffffffffc05105e8 drm_client_modeset_commit_atomic+0x1e8 ffffffffc0510ce6 drm_client_modeset_commit_locked+0x56 ffffffffc0510e24 drm_client_modeset_commit+0x24 ffffffffc088a743 __drm_fb_helper_restore_fbdev_mode_unlocked+0x93 ffffffffc088a683 drm_fb_helper_hotplug_event+0xe3 ffffffffc050f8aa drm_client_dev_hotplug+0x9a ffffffffc088555a output_poll_execute+0x29a ffffffffa9b35924 process_one_work+0x194 ffffffffa9b364ee worker_thread+0x2fe ffffffffa9b3ecad kthread+0xdd ffffffffa9a08549 ret_from_fork+0x29 On a server running ptp4l with the mgag200 driver loaded, we found that ptp4l would sometimes get blocked from execution because of this busy waiting loop. Every so often, approximately once every 20 minutes -- though with large variance -- the output_poll_execute() thread would detect some sort of change that required performing a hotplug event which results in attempting to stop the BMC scanout, resulting in a 300msec delay on one CPU. On this system, ptp4l was pinned to a single CPU. When the output_poll_execute() thread ran on that CPU, it blocked ptp4l from executing for its 300 millisecond duration. This resulted in PTP service disruptions such as failure to send a SYNC message on time, failure to handle ANNOUNCE messages on time, and clock check warnings from the application. All of this despite the application being configured with FIFO_RT and a higher priority than the background workqueue tasks. (However, note that the kernel did not use CONFIG_PREEMPT...) It is unclear if the event is due to a faulty VGA connection, another bug, or actual events causing a change in the connection. At least on the system under test it is not a one-time event and consistently causes disruption to the time sensitive applications. The function has some helpful comments explaining what steps it is attempting to take. In particular, step 3a and 3b are explained as such: 3a - The third step is to verify if there is an active scan. We are waiting on a 0 on remhsyncsts (<XSPAREREG<0>. 3b - This step occurs only if the remove is actually scanning. We are waiting for the end of the frame which is a 1 on remvsyncsts (<XSPAREREG<1>). The actual steps 3a and 3b are implemented as while loops with a non-sleeping udelay(). The first step iterates while the tmp value at position 0 is *not* set. That is, it keeps iterating as long as the bit is zero. If the bit is already 0 (because there is no active scan), it will iterate the entire 300 attempts which wastes 300 milliseconds in total. This is opposite of what the description claims. The step 3b logic only executes if we do not iterate over the entire 300 attempts in the first loop. If it does trigger, it is trying to check and wait for a 1 on the remvsyncsts. However, again the condition is actually inverted and it will loop as long as the bit is 1, stopping once it hits zero (rather than the explained attempt to wait until we see a 1). Worse, both loops are implemented using non-sleeping waits which spin instead of allowing the scheduler to run other processes. If the kernel is not configured to allow arbitrary preemption, it will waste valuable CPU time doing nothing. There does not appear to be any documentation for the BMC register interface, beyond what is in the comments here. It seems more probable that the comment here is correct and the implementation accidentally got inverted from the intended logic. Reading through other DRM driver implementations, it does not appear that the .atomic_enable or .atomic_disable handlers need to delay instead of sleep. For example, the ast_astdp_encoder_helper_atomic_disable() function calls ast_dp_set_phy_sleep() which uses msleep(). The "atomic" in the name is referring to the atomic modesetting support, which is the support to enable atomic configuration from userspace, and not to the "atomic context" of the kernel. There is no reason to use udelay() here if a sleep would be sufficient. Replace the while loops with a read_poll_timeout() based implementation that will sleep between iterations, and which stops polling once the condition is met (instead of looping as long as the condition is met). This aligns with the commented behavior and avoids blocking on the CPU while doing nothing. Note the RREG_DAC is implemented using a statement expression to allow working properly with the read_poll_timeout family of functions. The other RREG_<TYPE> macros ought to be cleaned up to have better semantics, and several places in the mgag200 driver could make use of RREG_DAC or similar RREG_* macros should likely be cleaned up for better semantics as well, but that task has been left as a future cleanup for a non-bugfix. Fixes: 414c45310625 ("mgag200: initial g200se driver (v2)") Suggested-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patch.msgid.link/20260202-jk-mgag200-fix-bad-udelay-v2-1-ce1e9665987d@intel.com
2026-02-04drm/i915/display: Implement Wa_16024710867Mitul Golani-1/+3
Defeature port sync feature for xe3lpd onwards. --v1: - Use xe3lpd naming (Suraj) - Use IS_DISPLAY_VER (Suraj) --v2: - Comments update and Adding Bspec link (Suraj) Bspec: 69965 Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patch.msgid.link/20260203084937.1447834-2-mitulkumar.ajitkumar.golani@intel.com
2026-02-04Merge tag 'soc_fsl-6.20-1' of ↵Arnd Bergmann-63/+182
https://git.kernel.org/pub/scm/linux/kernel/git/chleroy/linux into soc/drivers FSL SOC Changes for 6.20 Freescale Management Complex: - Convert fsl-mc bus to bus callbacks - Fix a use-after-free - Drop redundant error messages - Fix ressources release on some error path Freescale QUICC Engine: - Add an interrupt controller for IO Ports - Use scoped for-each OF child loop * tag 'soc_fsl-6.20-1' of https://git.kernel.org/pub/scm/linux/kernel/git/chleroy/linux: bus: fsl-mc: fix an error handling in fsl_mc_device_add() soc: fsl: qe: qe_ports_ic: Consolidate chained IRQ handler install/remove dt-bindings: soc: fsl: qe: Add an interrupt controller for QUICC Engine Ports soc: fsl: qe: Add an interrupt controller for QUICC Engine Ports soc: fsl: qe: Simplify with scoped for each OF child loop bus: fsl-mc: fix use-after-free in driver_override_show() bus: fsl-mc: Convert to bus callbacks bus: fsl-mc: Drop error message in probe function Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-02-04s390/tape: Rename tape_34xx.c to tape_3490.cJan Höppner-132/+132
The driver now exclusively supports 3490 tape devices, given support for 3480 tape devices has been removed. Update the device driver name, its source file name, and change any occurrences of "34xx/34XX" to "3490" in the source code and comments. Signed-off-by: Jan Höppner <hoeppner@linux.ibm.com> Reviewed-by: Jens Remus <jremus@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2026-02-04s390/tape: Cleanup sense data analysis and error handlingJan Höppner-120/+0
Quite a few Error Recovery Action (ERA) codes and sense data entries are not relevant anymore for the Virtual Tape Server (VTS) and are not being used by VTS. Most of them were relevant for actual physical errors when a tape cartridge got stuck or a tape didn't rewind properly for example. Remove these codes from the sense data analysis as it's dead code anyway. Signed-off-by: Jan Höppner <hoeppner@linux.ibm.com> Reviewed-by: Jens Remus <jremus@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2026-02-04s390/tape: Remove 3480 tape device typeJan Höppner-61/+26
The only supported device type by the Virtual Tape Server is 3490. The 3480 device type was an old physical tape model and doesn't exist anymore. Remove 3480 from the list and any mention of it. Signed-off-by: Jan Höppner <hoeppner@linux.ibm.com> Reviewed-by: Jens Remus <jremus@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>