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2025-02-03drm/xe/pxp/uapi: Add API to mark a BO as using PXPDaniele Ceraolo Spurio1-0/+19
The driver needs to know if a BO is encrypted with PXP to enable the display decryption at flip time. Furthermore, we want to keep track of the status of the encryption and reject any operation that involves a BO that is encrypted using an old key. There are two points in time where such checks can kick in: 1 - at VM bind time, all operations except for unmapping will be rejected if the key used to encrypt the BO is no longer valid. This check is opt-in via a new VM_BIND flag, to avoid a scenario where a malicious app purposely shares an invalid BO with a non-PXP aware app (such as a compositor). If the VM_BIND was failed, the compositor would be unable to display anything at all. Allowing the bind to go through means that output still works, it just displays garbage data within the bounds of the illegal BO. 2 - at job submission time, if the queue is marked as using PXP, all objects bound to the VM will be checked and the submission will be rejected if any of them was encrypted with a key that is no longer valid. Note that there is no risk of leaking the encrypted data if a user does not opt-in to those checks; the only consequence is that the user will not realize that the encryption key is changed and that the data is no longer valid. v2: Better commnnts and descriptions (John), rebase v3: Properly return the result of key_assign up the stack, do not use xe_bo in display headers (Jani) v4: improve key_instance variable documentation (John) Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250129174140.948829-11-daniele.ceraolospurio@intel.com
2025-02-03drm/xe/pxp/uapi: Add a query for PXP statusDaniele Ceraolo Spurio1-0/+35
PXP prerequisites (SW proxy and HuC auth via GSC) are completed asynchronously from driver load, which means that userspace can start submitting before we're ready to start a PXP session. Therefore, we need a query that userspace can use to check not only if PXP is supported but also to wait until the prerequisites are done. v2: Improve doc, do not report TYPE_NONE as supported (José) v3: Better comments, remove unneeded copy_from_user (John) Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: José Roberto de Souza <jose.souza@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250129174140.948829-10-daniele.ceraolospurio@intel.com
2025-02-03drm/xe/pxp/uapi: Add userspace and LRC support for PXP-using queuesDaniele Ceraolo Spurio1-1/+39
Userspace is required to mark a queue as using PXP to guarantee that the PXP instructions will work. In addition to managing the PXP sessions, when a PXP queue is created the driver will set the relevant bits in its context control register. On submission of a valid PXP queue, the driver will validate all encrypted objects mapped to the VM to ensured they were encrypted with the current key. v2: Remove pxp_types include outside of PXP code (Jani), better comments and code cleanup (John) v3: split the internal PXP management to a separate patch for ease of review. re-order ioctl checks to always return -EINVAL if parameters are invalid, rebase on msix changes. Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250129174140.948829-9-daniele.ceraolospurio@intel.com
2025-02-03drm/amdgpu: add a BO metadata flag to disable write compression for VulkanMarek Olšák1-1/+8
Vulkan can't support DCC and Z/S compression on GFX12 without WRITE_COMPRESS_DISABLE in this commit or a completely different DCC interface. AMDGPU_TILING_GFX12_SCANOUT is added because it's already used by userspace. Cc: stable@vger.kernel.org # 6.12.x Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-01-30Merge drm/drm-next into drm-xe-nextLucas De Marchi5-1/+530
Backmerge drm-next to get the common APIs and refactors as well as getting the display changes from i915 in xe so the probe order can be improved. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2025-01-24drm: add modifiers for MediaTek tiled formatsEric R. Smith1-0/+41
MediaTek (MTK) uses some unique tiled memory formats for video decoding. Add these to the uapi drm_fourcc.h so that we can use them in Mesa, GStreamer, and other tools/libraries. v2: - Classify the modifier bits into categories and provide room for expansion (Daniel S.) Signed-off-by: Eric R. Smith <eric.smith@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241219174929.126205-1-eric.smith@collabora.com Signed-off-by: Daniel Stone <daniels@collabora.com>
2025-01-21drm/xe/uapi: Fix documentation indentationRodrigo Vivi1-18/+18
Fix these issues: Documentation/gpu/driver-uapi:29: include/uapi/drm/xe_drm.h:817: WARNING: +Bullet list ends without a blank line; unexpected unindent. Documentation/gpu/driver-uapi:29: include/uapi/drm/xe_drm.h:835: WARNING: +Definition list ends without a blank line; unexpected unindent. Fixes: 75d37750a753 ("drm/xe/mmap: Add mmap support for PCI memory barrier") Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Closes: https://lore.kernel.org/intel-xe/20250117164023.3fdc00b9@canb.auug.org.au/ Cc: Tejas Upadhyay <tejas.upadhyay@intel.com> Tested-by: Bagas Sanjaya <bagasdotme@gmail.com> Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250117193827.91779-1-rodrigo.vivi@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-01-16drm/xe/mmap: Add mmap support for PCI memory barrierTejas Upadhyay1-1/+28
In order to avoid having userspace to use MI_MEM_FENCE, we are adding a mechanism for userspace to generate a PCI memory barrier with low overhead (avoiding IOCTL call as well as writing to VRAM will adds some overhead). This is implemented by memory-mapping a page as uncached that is backed by MMIO on the dGPU and thus allowing userspace to do memory write to the page without invoking an IOCTL. We are selecting the MMIO so that it is not accessible from the PCI bus so that the MMIO writes themselves are ignored, but the PCI memory barrier will still take action as the MMIO filtering will happen after the memory barrier effect. When we detect special defined offset in mmap(), We are mapping 4K page which contains the last of page of doorbell MMIO range to userspace for same purpose. For user to query special offset we are adding special flag in mmap_offset ioctl which needs to be passed as follows, struct drm_xe_gem_mmap_offset mmo = { .handle = 0, /* this must be 0 */ .flags = DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER, }; igt_ioctl(fd, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo); map = mmap(NULL, size, PROT_WRITE, MAP_SHARED, fd, mmo); IGT : https://gitlab.freedesktop.org/drm/igt-gpu-tools/-/commit/b2dbc6f22815128c0dd5c737504f42e1f1a6ad62 UMD : https://github.com/intel/compute-runtime/pull/772 V7: - Dgpu filter added V6(MAuld) - Move physical mmap to fault handler - Modify kernel-doc and attach UMD PR when ready V5(MAuld) - Return invalid early in case of non 4K PAGE_SIZE - Format kernel-doc and add note for 4K PAGE_SIZE HW limit V4(MAuld) - Add kernel-doc for uapi change - Restrict page size to 4K V3(MAuld) - Remove offset defination from UAPI to be able to change later - Edit commit message for special flag addition V2(MAuld) - Add fault handler with dummy page to handle unplug device - Add Build check for special offset to be below normal start page - Test d3hot, mapping seems to be valid in d3hot as well - Add more info to commit message Cc: Matthew Auld <matthew.auld@intel.com> Acked-by: Michal Mrozek <michal.mrozek@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250113114201.3178806-1-tejas.upadhyay@intel.com
2025-01-13Merge tag 'drm-msm-next-2025-01-07' of gitlab.freedesktop.org:drm/msm into ↵Dave Airlie1-0/+1
drm-next Updates for v6.14 MDSS: - properly described UBWC registers - added SM6150 (aka QCS615) support MDP4: - several small fixes DPU: - added SM6150 (aka QCS615) support - enabled wide planes if virtual planes are enabled (by using two SSPPs for a single plane) - fixed modes filtering for platforms w/o 3DMux - fixed DSPP DSPP_2 / _3 links on several platforms - corrected DSPP definitions on SDM670 - added CWB hardware blocks support - added VBIF to DPU snapshots - dropped struct dpu_rm_requirements DP: - reworked DP audio support DSI: - added SM6150 (aka QCS615) support GPU: - Print GMU core fw version - GMU bandwidth voting for a740 and a750 - Expose uche trap base via uapi - UAPI error reporting Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rob Clark <robdclark@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGsutUu4ff6OpXNXxqf1xaV0rV6oV23VXNRiF0_OEfe72Q@mail.gmail.com
2025-01-09Merge tag 'drm-xe-next-2025-01-07' of ↵Dave Airlie1-0/+7
https://gitlab.freedesktop.org/drm/xe/kernel into drm-next UAPI Changes: - OA new property: 'unblock after N reports' (Ashutosh) i915 display Changes: - UHBR rates for Thunderbolt (Kahola) Driver Changes: - IRQ related fixes and improvements (Ilia) - Revert some changes that break a mesa debug tool (John) - Fix migration issues (Nirmoy) - Enable GuC's WA_DUAL_QUEUE for newer platforms (Daniele) - Move shrink test out of xe_bo (Nirmoy) - SRIOV PF: Use correct function to check LMEM provisioning (Michal) - Fix a false-positive "Missing outer runtime PM protection" warning (Rodrigo) - Make GSCCS disabling message less alarming (Daniele) - Fix DG1 power gate sequence (Rodrigo) - Xe files fixes (Lucas) - Fix a potential TP_printk UAF (Thomas) - OA Fixes (Umesh) - Fix tlb invalidation when wedging (Lucas) - Documentation fix (Lucas) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/Z31579j3V3XCPFaK@intel.com
2025-01-09accel/ivpu: Add API for command queue create/destroy/submitKarol Wachowski1-0/+84
Implement support for explicit command queue management. To allow more flexible control over command queues add capabilities to create, destroy and submit jobs to specific command queues. Signed-off-by: Karol Wachowski <karol.wachowski@intel.com> Signed-off-by: Maciej Falkowski <maciej.falkowski@linux.intel.com> Reviewed-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250107173238.381120-3-maciej.falkowski@linux.intel.com
2025-01-03drm/msm: Expose uche trap base via uapiDanylo Piliaiev1-0/+1
This adds MSM_PARAM_UCHE_TRAP_BASE that will be used by Mesa implementation for VK_KHR_shader_clock and GL_ARB_shader_clock. Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com> Patchwork: https://patchwork.freedesktop.org/patch/627036/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-12-20Merge tag 'drm-misc-next-2024-12-19' of ↵Dave Airlie3-8/+82
https://gitlab.freedesktop.org/drm/misc/kernel into drm-next drm-misc-next for 6.14: UAPI Changes: Cross-subsystem Changes: Core Changes: - connector: Add a mutex to protect ELD access, Add a helper to create a connector in two steps Driver Changes: - amdxdna: Add RyzenAI-npu6 Support, various improvements - rcar-du: Add r8a779h0 Support - rockchip: various improvements - zynqmp: Add DP audio support - bridges: - ti-sn65dsi83: Add ti,lvds-vod-swing optional properties - panels: - new panels: Tianma TM070JDHG34-00, Multi-Inno Technology MI1010Z1T-1CP11 Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <mripard@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241219-truthful-demonic-hound-598f63@houat
2024-12-17accel/amdxdna: Remove DRM_AMDXDNA_HWCTX_CONFIG_NUMLizhi Hou1-1/+0
Defining a number of enum elements in uapi header is meaningless. It will not be used as expected and can potentially lead to incompatible issue between user space application and driver. Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241217165446.2607585-2-lizhi.hou@amd.com
2024-12-17accel/amdxdna: Add zero check for pad in ioctl input structuresLizhi Hou1-5/+5
For input ioctl structures, it is better to check if the pad is zero. Thus, the pad bytes might be usable in the future. Suggested-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241217165446.2607585-1-lizhi.hou@amd.com
2024-12-17drm/panthor: Report innocent group killBoris Brezillon1-0/+9
Groups can be killed during a reset even though they did nothing wrong. That usually happens when the FW is put in a bad state by other groups, resulting in group suspension failures when the reset happens. If we end up in that situation, flag the group innocent and report innocence through a new DRM_PANTHOR_GROUP_STATE flag. Bump the minor driver version to reflect the uAPI change. Changes in v4: - Add an entry to the driver version changelog - Add R-bs Changes in v3: - Actually report innocence to userspace Changes in v2: - New patch Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com> Reviewed-by: Steven Price <steven.price@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241211080500.2349505-1-boris.brezillon@collabora.com
2024-12-16drm/xe/oa/uapi: Expose an unblock after N reports OA propertyAshutosh Dixit1-0/+7
Expose an "unblock after N reports" OA property, to allow userspace threads to be woken up less frequently. Co-developed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241212224903.1853862-1-ashutosh.dixit@intel.com
2024-12-16accel/amdxdna: Enhance power management settingsLizhi Hou1-0/+52
Add SET_STATE ioctl to configure device power mode for aie2 device. Three modes are supported initially. POWER_MODE_DEFAULT: Enable clock gating and set DPM (Dynamic Power Management) level to value which has been set by resource solver or maximum DPM level the device supports. POWER_MODE_HIGH: Enable clock gating and set DPM level to maximum DPM level the device supports. POWER_MODE_TURBO: Disable clock gating and set DPM level to maximum DPM level the device supports. Disabling clock gating means all clocks always run on full speed. And the different clock frequency are used based on DPM level been set. Initially, the driver set the power mode to default mode. Co-developed-by: Narendra Gutta <VenkataNarendraKumar.Gutta@amd.com> Signed-off-by: Narendra Gutta <VenkataNarendraKumar.Gutta@amd.com> Co-developed-by: George Yang <George.Yang@amd.com> Signed-off-by: George Yang <George.Yang@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241213232933.1545388-4-lizhi.hou@amd.com
2024-12-13accel/amdxdna: Add query firmware versionLizhi Hou1-1/+15
Enhance GET_INFO ioctl to support retrieving firmware version. Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241206220001.164049-6-lizhi.hou@amd.com
2024-12-13accel/qaic: Fix typo for struct qaic_manage_trans_passthroughJeffrey Hugo1-1/+1
The documentation header for struct qaic_manage_trans_passthrough has a typo - "t" is missing in "transaction". Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Reviewed-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Reviewed-by: Youssef Samir <quic_yabdulra@quicinc.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241129202845.3579306-1-quic_jhugo@quicinc.com
2024-12-13Merge tag 'drm-xe-next-2024-12-11' of ↵Dave Airlie1-0/+9
https://gitlab.freedesktop.org/drm/xe/kernel into drm-next UAPI Changes: - Make OA buffer size configurable (Sai) Display Changes (including i915): - Fix ttm_bo_access() usage (Auld) - Power request asserting/deasserting for Xe3lpd (Mika) - One Type-C conversion towards struct intel_display (Mika) Driver Changes: - GuC capture related fixes (Everest, Zhanjun) - Move old workaround to OOB infra (Lucas) - Compute mode change refactoring (Bala) - Add ufence and g2h flushes for LNL Hybrid timeouts (Nirmoy) - Avoid unnecessary OOM kills (Thomas) - Restore system memory GGTT mappings (Brost) - Fix build error for XE_IOCTL_DBG macro (Gyeyoung) - Documentation updates and fixes (Lucas, Randy) - A few exec IOCTL fixes (Brost) - Fix potential GGTT allocation leak (Michal) - Fix races on fdinfo (Lucas) - SRIOV VF: Post-migration recovery worker basis (Tomasz) - GuC Communication fixes and improvements (Michal, John, Tomasz, Auld, Jonathan) - SRIOV PF: Add support for VF scheduling priority - Trace improvements (Lucas, Auld, Oak) - Hibernation on igpu fixes and improvements (Auld) - GT oriented logs/asserts improvements (Michal) - Take job list lock in xe_sched_first_pending_job (Nirmoy) - GSC: Improve SW proxy error checking and logging (Daniele) - GuC crash notifications & drop default log verbosity (John) - Fix races on fdinfo (Lucas) - Fix runtime_pm handling in OA (Ashutosh) - Allow fault injection in vm create and vm bind IOCTLs (Francois) - TLB invalidation fixes (Nirmoy, Daniele) - Devcoredump Improvements, doc and fixes (Brost, Lucas, Zhanjun, John) - Wake up waiters after setting ufence->signalled (Nirmoy) - Mark preempt fence workqueue as reclaim (Brost) - Trivial header/flags cleanups (Lucas) - VRAM drop 2G block restriction (Auld) - Drop useless d3cold allowed message (Brost) - SRIOV PF: Drop 2GiB limit of fair LMEM allocation (Michal) - Add another PTL PCI ID (Atwood) - Allow bo mapping on multiple ggtts (Niranjana) - Add support for GuC-to-GuC communication (John) - Update xe2_graphics name string (Roper) - VRAM: fix lpfn check (Auld) - Ad Xe3 workaround (Apoorva) - Migrate fixes (Auld) - Fix non-contiguous VRAM BO access (Brost) - Log throttle reasons (Raag) - Enable PMT support for BMG (Michael) - IRQ related fixes and improvements (Ilia) - Avoid evicting object of the same vm in none fault mode (Oak) - Fix in tests (Nirmoy) - Fix ERR_PTR handling (Mirsad) - Some reg_sr/whitelist fixes and refactors (Lucas) Signed-off-by: Dave Airlie <airlied@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCAAdFiEEbSBwaO7dZQkcLOKj+mJfZA7rE8oFAmdaHkMACgkQ+mJfZA7r # E8o+twf/XYZTk4O3qQ+yNL3PDQT0NIKjH8mEnmu4udyIw/sYhQe6ji+uh1YutK8Y # 41IQc06qQogTj36bqSwbjThw5asMfRh2sNR/p1uOy7RGUnN25FuYSXEgOeDWi/Ec # xrZE1TKPotFGeGI09KJmzjzMq94cgv97Pxma+5m8BjVsvzXQSzEJ2r9cC6ruSfNT # O5Jq5nqxHSkWUbKCxPnixSlGnH4jbsuiqS1E1pnH+u6ijxsfhOJj686wLn2FRkiw # 6FhXmJBrd8AZ0Q2E7h3UswE5O88I0ALDc58OINAzD1GMyzvZj2vB1pXgj5uNr0/x # Ku4cxu1jprsi+FLUdKAdYpxRBRanow== # =3Ou7 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 12 Dec 2024 09:20:35 AEST # gpg: using RSA key 6D207068EEDD65091C2CE2A3FA625F640EEB13CA # gpg: Good signature from "Rodrigo Vivi <rodrigo.vivi@intel.com>" [unknown] # gpg: aka "Rodrigo Vivi <rodrigo.vivi@gmail.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6D20 7068 EEDD 6509 1C2C E2A3 FA62 5F64 0EEB 13CA From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/Z1ofx-fExLQKV_e4@intel.com
2024-12-10drm/xe/oa/uapi: Make OA buffer size configurableSai Teja Pottumuttu1-0/+9
Add a new property called DRM_XE_OA_PROPERTY_OA_BUFFER_SIZE to allow OA buffer size to be configurable from userspace. With this OA buffer size can be configured to any power of 2 size between 128KB and 128MB and it would default to 16MB in case the size is not supplied. v2: - Rebase v3: - Add oa buffer size to capabilities [Ashutosh] - Address several nitpicks [Ashutosh] - Fix commit message/subject [Ashutosh] BSpec: 61100, 61228 Signed-off-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241205041913.883767-2-sai.teja.pottumuttu@intel.com
2024-12-04drm/v3d: Add DRM_IOCTL_V3D_PERFMON_SET_GLOBALChristian Gmeiner1-0/+18
Add a new ioctl, DRM_IOCTL_V3D_PERFMON_SET_GLOBAL, to allow configuration of a global performance monitor (perfmon). Use the global perfmon for all jobs to ensure consistent performance tracking across submissions. This feature is needed to implement a Perfetto datasources in user-space. Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com> Reviewed-by: Maíra Canal <mcanal@igalia.com> Signed-off-by: Maíra Canal <mcanal@igalia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241202140615.74802-1-christian.gmeiner@gmail.com
2024-12-02Merge drm/drm-next into drm-misc-nextMaxime Ripard3-1/+22
Kickstart 6.14 cycle. Signed-off-by: Maxime Ripard <mripard@kernel.org>
2024-11-22accel/amdxdna: Add query functionsLizhi Hou1-0/+166
Add GET_INFO ioctl to retrieve hardware information, including AIE, clock, hardware context etc. Co-developed-by: Min Ma <min.ma@amd.com> Signed-off-by: Min Ma <min.ma@amd.com> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241118172942.2014541-11-lizhi.hou@amd.com
2024-11-22accel/amdxdna: Add command executionLizhi Hou1-0/+38
Add interfaces for user application to submit command and wait for its completion. Co-developed-by: Min Ma <min.ma@amd.com> Signed-off-by: Min Ma <min.ma@amd.com> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241118172942.2014541-8-lizhi.hou@amd.com
2024-11-22accel/amdxdna: Add GEM buffer object managementLizhi Hou1-0/+77
There different types of BOs are supported: - shmem A user application uses shmem BOs as input/output for its workload running on NPU. - device memory heap The fixed size buffer dedicated to the device. - device buffer The buffer object allocated from device memory heap. - command buffer The buffer object created for delivering commands. The command buffer object is small and pinned on creation. New IOCTLs are added: CREATE_BO, GET_BO_INFO, SYNC_BO. SYNC_BO is used to explicitly flush CPU cache for BO memory. Co-developed-by: Min Ma <min.ma@amd.com> Signed-off-by: Min Ma <min.ma@amd.com> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241118172942.2014541-7-lizhi.hou@amd.com
2024-11-22accel/amdxdna: Add hardware contextLizhi Hou1-0/+131
The hardware can be shared among multiple user applications. The hardware resources are allocated/freed based on the request from user application via driver IOCTLs. DRM_IOCTL_AMDXDNA_CREATE_HWCTX Allocate tile columns and create a hardware context structure to track the usage and status of the resources. A hardware context ID is returned for XDNA command execution. DRM_IOCTL_AMDXDNA_DESTROY_HWCTX Release hardware context based on its ID. The tile columns belong to this hardware context will be reclaimed. DRM_IOCTL_AMDXDNA_CONFIG_HWCTX Config hardware context. Bind the hardware context to the required resources. Co-developed-by: Min Ma <min.ma@amd.com> Signed-off-by: Min Ma <min.ma@amd.com> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241118172942.2014541-6-lizhi.hou@amd.com
2024-11-22accel/amdxdna: Add a new driver for AMD AI EngineLizhi Hou1-0/+24
AMD AI Engine forms the core of AMD NPU and can be used for accelerating machine learning applications. Add the driver to support AI Engine integrated to AMD CPU. Only very basic functionalities are added. - module and PCI device initialization - firmware load - power up - low level hardware initialization Co-developed-by: Narendra Gutta <VenkataNarendraKumar.Gutta@amd.com> Signed-off-by: Narendra Gutta <VenkataNarendraKumar.Gutta@amd.com> Co-developed-by: George Yang <George.Yang@amd.com> Signed-off-by: George Yang <George.Yang@amd.com> Co-developed-by: Min Ma <min.ma@amd.com> Signed-off-by: Min Ma <min.ma@amd.com> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241118172942.2014541-3-lizhi.hou@amd.com
2024-11-11drm/fourcc: add AMD_FMT_MOD_TILE_GFX9_4K_D_XQiang Yu1-0/+1
This is used when radeonsi export small texture's modifier to user with eglExportDMABUFImageQueryMESA(). mesa changes is available here: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31658 Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Qiang Yu <qiang.yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-11-05Merge tag 'drm-xe-next-2024-10-31' of ↵Dave Airlie1-0/+17
https://gitlab.freedesktop.org/drm/xe/kernel into drm-next UAPI Changes: - Define and parse OA sync properties (Ashutosh) Driver Changes: - Add caller info to xe_gt_reset_async (Nirmoy) - A large forcewake rework / cleanup (Himal) - A g2h response timeout fix (Badal) - A PTL workaround (Vinay) - Handle unreliable MMIO reads during forcewake (Shuicheng) - Ufence user-space access fixes (Nirmoy) - Annotate flexible arrays (Matthew Brost) - Enable GuC lite restore (Fei) - Prevent GuC register capture on VF (Zhanjun) - Show VFs VRAM / LMEM provisioning summary over debugfs (Michal) - Parallel queues fix on GT reset (Nirmoy) - Move reference grabbing to a job's dma-fence (Matt Brost) - Mark a number of local workqueues WQ_MEM_RECLAIM (Matt Brost) - OA synchronization support (Ashutosh) - Capture all available bits of GuC timestamp to GuC log (John) - Increase readability of guc_info debugfs (John) - Add a mmio barrier before GGTT invalidate (Matt Brost) - Don't short-circuit TDR on jobs not started (Matt Brost) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Thomas Hellstrom <thomas.hellstrom@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ZyNvA_vZZYR-1eWE@fedora
2024-11-05Merge tag 'drm-msm-next-2024-10-28' of ↵Dave Airlie1-1/+4
https://gitlab.freedesktop.org/drm/msm into drm-next Updates for v6.13 Core: - Switch to aperture_remove_all_conflicting_devices() - Simplify msm_disp_state_dump_regs() DPU: - Add SA8775P support - Add (disabled by default) MSM8917, MSM8937, MSM8953 and MSM8996 support - Enable support for larger framebuffers (required for X.Org working with several outputs) - Dropped LM_3, LM_4 (MSM8998, SDM845) - Fixed DSPP_3 routing on SDM845 DP: - Add SA8775P support HDMI: - Mark two arrays as const in MSM8998 HDMI PHY driver GPU: - a7xx preemption support - Adreno A663 support - Typos fixes, etc - Fix excessive stack usage in a6xx GMU Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rob Clark <robdclark@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGt7k8zDHsg2Uzx9apzyQMut8XdLXMQSRNn7WArdPUV5Qw@mail.gmail.com
2024-10-30accel/ivpu: Remove copy engine supportAndrzej Kacprowski1-5/+1
Copy engine was deprecated by the FW and is no longer supported. Compute engine includes all copy engine functionality and should be used instead. This change does not affect user space as the copy engine was never used outside of a couple of tests. Signed-off-by: Andrzej Kacprowski <Andrzej.Kacprowski@intel.com> Reviewed-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241017145817.121590-4-jacek.lawrynowicz@linux.intel.com
2024-10-23drm/xe/oa/uapi: Define and parse OA sync propertiesAshutosh Dixit1-0/+17
Now that we have laid the groundwork, introduce OA sync properties in the uapi and parse the input xe_sync array as is done elsewhere in the driver. Also add DRM_XE_OA_CAPS_SYNCS bit in OA capabilities for userspace. v2: Fix and document DRM_XE_SYNC_TYPE_USER_FENCE for OA (Matt B) Add DRM_XE_OA_CAPS_SYNCS bit to OA capabilities (Jose) Acked-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241022200352.1192560-3-ashutosh.dixit@intel.com
2024-10-14Merge drm/drm-next into drm-misc-nextThomas Zimmermann1-1/+3
Backmerging to get fixes from v6.12-rc2. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
2024-10-11accel/ivpu: Stop using hardcoded DRIVER_DATEJacek Lawrynowicz1-3/+0
Hardcoded driver date is useless, so use kernel version as a driver date to make identifying .ko file easier. Also allow to pass DRIVER_DATE on build time to allow versioning the driver in case it is built out of the tree. Reviewed-by: Karol Wachowski <karol.wachowski@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240930195322.461209-13-jacek.lawrynowicz@linux.intel.com Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>
2024-10-11Merge tag 'drm-xe-next-2024-10-10' of ↵Dave Airlie1-1/+3
https://gitlab.freedesktop.org/drm/xe/kernel into drm-next Cross-subsystem Changes: - Add drm_line_printer (Michal) Driver Changes: - Fix an UAF (Matt Auld) - Sanity check compression and coherency mode (Matt Auld) - Some PIC-ID work (Jani) - Use IS_ENABLED() instead of defined() on config options. - gt powergating work (Riana) - Suppress missing out ter rpm protection warning (Rodrigo) - Fix a vm leak (Dafna) - Clean up and update 'has_flat_ccs' handling (Lucas) - Fix arg to pci_iomap (Lucas) - Mark reserved engines in shapshot (Lucas) - Don't keep stale pointer (Michal) - Fix build warning with CONFIG_PM=n (Arnd) - Add a xe_bo subtest for shrinking / swapping (Thomas) - Add a warkaround (Tejas) - Some display PM work (Maarten) - Enable Xe2 + PES disaggregation (Ashutosh) - Large xe_mmio rework / cleanup (Matt Roper) - A couple of fixes / cleanups in the xe client code (Matt Auld) - Fix page-fault handling on closed VMs (Matt Brost) - Fix overflow in OA batch buffer (José) - Style fixes (Lucas, Jiapeng, Nitin) - Fixes and new development around SRIOV (Michal) - Use devm_add_action_or_reset() in gt code (He) - Fix CCS offset calculation (Matt Auld) - Remove i915_drv.h include (Rodrigo) - Restore PCI state on resume (Rodrigo) - Fix DSB buffer coherency / Revert DSB disabling (Maarten / Animesh) - Convert USM lock to rwsem (Matt Brost) - Defer gt-mmio intialization (Matt Roper) - meemirq changes (Ilia) - Move some PVC related code out of xe-for-CI and to the driver (Rodrigo / Jani) - Use a helper for ASID->VM lookup (Matt Brost) - Add new PCI id for ARL (Dnyaneshwar) - Use Xe2_LPM steering tables for Xe2_HPM (Gustavo) - Performance tuning work for media GT and L3 cache flushing (Gustavo) - Clean up VM- and exec queue file lock usage (Matt Brost) - GuC locking fix (Matt Auld) - Fix UAF around queue destruction (Matt Auld) - Move IRQ-related registers to dedicated header (Matt Roper) - Resume TDR after GT reset (Matt Brost) - Move xa_alloc to prevent UAF (Matt Auld) - Fix OA stream close (José) - Remove unused i915_gpu_error.h (Jani) - Prevent null pointer access in xe_migrate_copy (Zhanjun) - Fix memory leak when aborting binds (Matt Brost) - Prevent UAF in send_recv() (Matt Auld) - Fix xa_store() error checking (Matt Auld) - drop irq disabling around xa_erase in guc code (Matt Auld) - Use fault injection infrastructure to find issues as probe time (Francois) - Fix a workaround implementation. (Vinay) - Mark wedged_mode debugfs writable (Matt Roper) - Fix for prviewous memirq work (Michal) - More SRIOV work (Michal) - Devcoredump work (John) - GuC logging + devcoredump support (John) - Don't report L3 bank availability on PTL (Shekhar) - Replicate Xe2 PAT settings on Xe2 (Matt Roper) - Define Xe3 feature flags (Haridhar) - Reuse Xe2 MOCS table on on PTL (Haridhar) - Add PTL platform definition (Haridhar) - Add MCR steering for Xe3 (Matt) - More work around GuC capture for devcoredump (Zhanjun) - Improve cache flushing behaviour on bmg (Matt Auld) - Fix shrinker test compiler warnings on 32-bit (Thomas) - Initial set of workarounds for Xe3 (Gustavo) - Extend workaround for xe2lpg (Aradhya) - Fix unbalanced rpm put x 2 (Matt Auld) Signed-off-by: Dave Airlie <airlied@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQRskUM7w1oG5rx2IZO4FpNVCsYGvwUCZwekBwAKCRC4FpNVCsYG # v32oAQDnIKVwjZecI1V3oUsy2ZE3TKWx8HH4FweT6S5L6tqZwQD/b0vkeA3UaojO # 5FIkPEqyHFbrj+Sw7bLonLb3LHv4WAE= # =FtY6 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 10 Oct 2024 19:53:11 AEST # gpg: using EDDSA key 6C91433BC35A06E6BC762193B81693550AC606BF # gpg: Can't check signature: No public key # Conflicts: # drivers/gpu/drm/xe/xe_gt_mcr.c # drivers/gpu/drm/xe/xe_tuning.c From: Thomas Hellstrom <thomas.hellstrom@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/Zwekwrak12c5SSgo@fedora
2024-10-08drm/xe/ptl: L3bank mask is not available on the media GTShekhar Chauhan1-1/+3
On PTL platforms with media version 30.00, the fuse registers for reporting L3 bank availability to the GT just read out as ~0 and do not provide proper values. Xe does not use the L3 bank mask for anything internally; it only passes the mask through to userspace via the GT topology query. Since we don't have any way to get the real L3 bank mask, we don't want to pass garbage to userspace. Passing a zeroed mask or a copy of the primary GT's L3 bank mask would also be inaccurate and likely to cause confusion for userspace. The best approach is to simply not include L3 in the list of masks returned by the topology query in cases where we aren't able to provide a meaningful value. This won't change the behavior for any existing platforms (where we can always obtain L3 masks successfully for all GTs), it will only prevent us from mis-reporting bad information on upcoming platform(s). There's a good chance this will become a formal workaround in the future, but for now we don't have a lineage number so "no_media_l3" is used in place of a lineage as the OOB workaround descriptor. v2: - Re-calculate query size to properly match data returned. (Gustavo) - Update kerneldoc to clarify that the L3bank mask may not be included in the query results if the hardware doesn't make it available. (Gustavo) Cc: Matt Atwood <matthew.s.atwood@intel.com> Cc: Gustavo Sousa <gustavo.sousa@intel.com> Signed-off-by: Shekhar Chauhan <shekhar.chauhan@intel.com> Co-developed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Acked-by: Francois Dugast <francois.dugast@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241007154143.2021124-2-matthew.d.roper@intel.com
2024-10-08drm: add DRM_SET_CLIENT_NAME ioctlPierre-Eric Pelloux-Prayer1-0/+17
Giving the opportunity to userspace to associate a free-form name with a drm_file struct is helpful for tracking and debugging. This is similar to the existing DMA_BUF_SET_NAME ioctl. Access to client_name is protected by a mutex, and the 'clients' debugfs file has been updated to print it. Userspace MR to use this ioctl: https://gitlab.freedesktop.org/virgl/virglrenderer/-/merge_requests/1428 If the string passed by userspace contains chars that would mess up output when it's going to be printed (in dmesg, fdinfo, etc), -EINVAL is returned. A 0-length string is a valid use, and clears the existing name. Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241003124506.470931-2-pierre-eric.pelloux-prayer@amd.com Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
2024-10-03drm/msm/a6xx: Add a flag to allow preemption to submitqueue_createAntonino Maniscalco1-1/+4
Some userspace changes are necessary so add a flag for userspace to advertise support for preemption when creating the submitqueue. When this flag is not set preemption will not be allowed in the middle of the submitted IBs therefore mantaining compatibility with older userspace. The flag is rejected if preemption is not supported on the target, this allows userspace to know whether preemption is supported. Tested-by: Rob Clark <robdclark@gmail.com> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-QRD Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8450-HDK Signed-off-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/618028/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-09-25drm/panthor: Add DEV_QUERY_GROUP_PRIORITIES_INFO dev queryMary Guillemard1-0/+22
Expose allowed group priorities with a new device query. This new uAPI will be used in Mesa to properly report what priorities a user can use for EGL_IMG_context_priority. Since this extends the uAPI and because userland needs a way to advertise priorities accordingly, this also bumps the driver minor version. v2: - Remove drm_panthor_group_allow_priority_flags definition - Document that allowed_mask is a bitmask of drm_panthor_group_priority v3: - Use BIT macro in panthor_query_group_priorities_info - Add r-b from Steven Price and Boris Brezillon Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com> Reviewed-by: Steven Price <steven.price@arm.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Steven Price <steven.price@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240909064820.34982-4-mary.guillemard@collabora.com
2024-09-25drm/panthor: Add PANTHOR_GROUP_PRIORITY_REALTIME group priorityMary Guillemard1-0/+7
This adds a new value to drm_panthor_group_priority exposing the realtime priority to userspace. This is required to implement NV_context_priority_realtime in Mesa. v2: - Add Steven Price r-b v3: - Add Boris Brezillon r-b Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com> Reviewed-by: Steven Price <steven.price@arm.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Steven Price <steven.price@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240909064820.34982-3-mary.guillemard@collabora.com
2024-09-25drm/v3d: Expose Super Pages capabilityMaíra Canal1-0/+1
Add a new V3D parameter to expose the support of Super Pages to userspace. The userspace might want to know this information to apply optimizations that are specific to kernels with Super Pages enabled. Signed-off-by: Maíra Canal <mcanal@igalia.com> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240923141348.2422499-12-mcanal@igalia.com
2024-09-11Merge drm/drm-next into drm-misc-nextThomas Zimmermann2-1/+7
Backmerging to get fixes from v6.12-rc7. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
2024-09-11Merge v6.11-rc7 into drm-nextSimona Vetter1-1/+5
Thomas needs 5a498d4d06d6 ("drm/fbdev-dma: Only install deferred I/O if necessary") in drm-misc, so start the backmerge cascade. Signed-off-by: Simona Vetter <simona.vetter@ffwll.ch>
2024-09-06Merge tag 'drm-misc-fixes-2024-09-05' of ↵Dave Airlie1-1/+5
https://gitlab.freedesktop.org/drm/misc/kernel into drm-fixes A zpos normalization fix for komeda, a register bitmask fix for nouveau, a memory leak fix for imagination, three fixes for the recent bridge HDMI work, a potential DoS fix and a cache coherency for panthor, a change of panel compatible and a deferred-io fix when used with non-highmem memory. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <mripard@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240905-original-radical-guan-e7a2ae@houat
2024-09-05drm/panthor: Add DEV_QUERY_TIMESTAMP_INFO dev queryMary Guillemard1-0/+22
Expose timestamp information supported by the GPU with a new device query. Mali uses an external timer as GPU system time. On ARM, this is wired to the generic arch timer so we wire cntfrq_el0 as device frequency. This new uAPI will be used in Mesa to implement timestamp queries and VK_KHR_calibrated_timestamps. Since this extends the uAPI and because userland needs a way to advertise those features conditionally, this also bumps the driver minor version. v2: - Rewrote to use GPU timestamp register - Added timestamp_offset to drm_panthor_timestamp_info - Add missing include for arch_timer_get_cntfrq - Rework commit message v3: - Add panthor_gpu_read_64bit_counter - Change panthor_gpu_read_timestamp to use panthor_gpu_read_64bit_counter v4: - Fix multiple typos in uAPI documentation - Mention behavior when the timestamp frequency is unknown - Use u64 instead of unsigned long long for panthor_gpu_read_timestamp - Apply r-b from Mihail Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com> Reviewed-by: Mihail Atanassov <mihail.atanassov@arm.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240830080349.24736-2-mary.guillemard@collabora.com
2024-09-05drm/panthor: Restrict high priorities on group_createMary Guillemard1-1/+5
We were allowing any users to create a high priority group without any permission checks. As a result, this was allowing possible denial of service. We now only allow the DRM master or users with the CAP_SYS_NICE capability to set higher priorities than PANTHOR_GROUP_PRIORITY_MEDIUM. As the sole user of that uAPI lives in Mesa and hardcode a value of MEDIUM [1], this should be safe to do. Additionally, as those checks are performed at the ioctl level, panthor_group_create now only check for priority level validity. [1]https://gitlab.freedesktop.org/mesa/mesa/-/blob/f390835074bdf162a63deb0311d1a6de527f9f89/src/gallium/drivers/panfrost/pan_csf.c#L1038 Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com> Fixes: de8548813824 ("drm/panthor: Add the scheduler logical block") Cc: stable@vger.kernel.org Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240903144955.144278-2-mary.guillemard@collabora.com
2024-09-02drm/panfrost: Add cycle counter job requirementMary Guillemard1-0/+1
Extend the uAPI with a new job requirement flag for cycle counters. This requirement is used by userland to indicate that a job requires cycle counters or system timestamp to be propagated. (for use with write value timestamp jobs) We cannot enable cycle counters unconditionally as this would result in an increase of GPU power consumption. As a result, they should be left off unless required by the application. If a job requires cycle counters or system timestamps propagation, we must enable cycle counting before issuing a job and disable it right after the job completes. Since this extends the uAPI and because userland needs a way to advertise features like VK_KHR_shader_clock conditionally, we bumps the driver minor version. v2: - Rework commit message - Squash uAPI changes and implementation in this commit - Simplify changes based on Steven Price comments v3: - Add Steven Price r-b - Fix a codestyle issue Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com> Reviewed-by: Steven Price <steven.price@arm.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Steven Price <steven.price@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240819080224.24914-3-mary.guillemard@collabora.com
2024-09-02drm/panfrost: Add SYSTEM_TIMESTAMP and SYSTEM_TIMESTAMP_FREQUENCY parametersMary Guillemard1-0/+2
Expose system timestamp and frequency supported by the GPU. Mali uses an external timer as GPU system time. On ARM, this is wired to the generic arch timer so we wire cntfrq_el0 as device frequency. This new uAPI will be used in Mesa to implement timestamp queries and VK_KHR_calibrated_timestamps. v2: - Rewrote to use GPU timestamp register - Add missing include for arch_timer_get_cntfrq - Rework commit message v3: - Move panfrost_cycle_counter_get and panfrost_cycle_counter_put to panfrost_ioctl_query_timestamp - Handle possible overflow in panfrost_timestamp_read Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Steven Price <steven.price@arm.com> Signed-off-by: Steven Price <steven.price@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240819080224.24914-2-mary.guillemard@collabora.com
generated by cgit v1.2.3 (git 2.39.1) at 2026-01-31 09:04:43 +0000