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2025-09-03drm: panel-backlight-quirks: Make EDID match optionalAntheas Kapenekakis1-1/+1
Currently, having a valid panel_id match is required to use the quirk system. For certain devices, we know that all SKUs need a certain quirk. Therefore, allow not specifying ident by only checking for a match if panel_id is non-zero. Tested-by: Philip Müller <philm@manjaro.org> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Antheas Kapenekakis <lkml@antheas.dev> Link: https://lore.kernel.org/r/20250829145541.512671-2-lkml@antheas.dev Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
2025-09-03drm/panthor: check bo offset alignment in vm bindChia-I Wu1-2/+2
Fail early from panthor_vm_bind_prepare_op_ctx instead of late from ops->map_pages. Signed-off-by: Chia-I Wu <olvaffe@gmail.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com> Reviewed-by: Steven Price <steven.price@arm.com> Signed-off-by: Steven Price <steven.price@arm.com> Link: https://lore.kernel.org/r/20250828200116.3532255-1-olvaffe@gmail.com
2025-09-03drm/tidss: dispc: Explicitly include bitfield.hNathan Chancellor1-0/+1
After a recent series to use FIELD_PREP and FIELD_MODIFY in tidss_dispc.c, there are many errors when bitfield.h is not implicitly included, such as when building allmodconfig for ARCH=hexagon: drivers/gpu/drm/tidss/tidss_dispc.c:1116:2: error: call to undeclared function 'FIELD_MODIFY'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] 1116 | VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, v, | ^ drivers/gpu/drm/tidss/tidss_dispc.c:631:3: note: expanded from macro 'VP_REG_FLD_MOD' 631 | FIELD_MODIFY((mask), &_reg, (val)); \ | ^ drivers/gpu/drm/tidss/tidss_dispc.c:1140:2: error: call to undeclared function 'FIELD_MODIFY'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] 1140 | FIELD_MODIFY(DISPC_VP_DSS_OLDI_CFG_MAP_MASK, &oldi_cfg, | ^ drivers/gpu/drm/tidss/tidss_dispc.c:1203:10: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] 1203 | FIELD_PREP(DISPC_VP_TIMING_H_SYNC_PULSE_MASK, hsw - 1) | | ^ ... Explicitly include bitfield.h to resolve the errors. Fixes: 9accc8b10de8 ("drm/tidss: dispc: Get rid of FLD_VAL") Signed-off-by: Nathan Chancellor <nathan@kernel.org> Acked-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250902-drm-tidss-fix-missing-bitfield-h-v1-1-aaad4a285f98@kernel.org Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2025-09-02drm/display: bridge_connector: use drm_bridge_is_last()Luca Ceresoli1-3/+2
Simplify code to know whether a bridge is the last in the chain by using drm_bridge_is_last(). Reviewed-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250801-drm-bridge-alloc-getput-drm_bridge_get_next_bridge-v2-6-888912b0be13@bootlin.com Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
2025-09-02drm/bridge: add drm_bridge_is_last()Luca Ceresoli1-0/+5
Some code needing to know whether a bridge is the last in a chain currently call drm_bridge_get_next_bridge(). However drm_bridge_get_next_bridge() will soon increment the refcount of the returned bridge, which would make such code more annoying to write. In preparation for drm_bridge_get_next_bridge() to increment the refcount, as well as to simplify such code, introduce a simple bool function to tell whether a bridge is the last in the chain. Reviewed-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250801-drm-bridge-alloc-getput-drm_bridge_get_next_bridge-v2-5-888912b0be13@bootlin.com Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
2025-09-02drm/omapdrm: use drm_bridge_chain_get_last_bridge()Luca Ceresoli1-4/+2
Use drm_bridge_chain_get_last_bridge() instead of open coding a loop with two invocations of drm_bridge_get_next_bridge() per iteration. Besides being cleaner and more efficient, this change is necessary in preparation for drm_bridge_get_next_bridge() to get a reference to the returned bridge. Reviewed-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250801-drm-bridge-alloc-getput-drm_bridge_get_next_bridge-v2-4-888912b0be13@bootlin.com Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
2025-09-02drm/bridge: imx93-mipi-dsi: use drm_bridge_chain_get_last_bridge()Luca Ceresoli1-7/+5
Use drm_bridge_chain_get_last_bridge() instead of open coding a loop with two invocations of drm_bridge_get_next_bridge() per iteration. Besides being cleaner and more efficient, this change is necessary in preparation for drm_bridge_get_next_bridge() to get a reference to the returned bridge. Reviewed-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Liu Ying <victor.liu@nxp.com> Link: https://lore.kernel.org/r/20250801-drm-bridge-alloc-getput-drm_bridge_get_next_bridge-v2-3-888912b0be13@bootlin.com Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
2025-09-02drm/bridge: add drm_bridge_chain_get_last_bridge()Luca Ceresoli1-0/+18
Add an equivalent of drm_bridge_chain_get_first_bridge() to get the last bridge. Reviewed-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250801-drm-bridge-alloc-getput-drm_bridge_get_next_bridge-v2-2-888912b0be13@bootlin.com Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
2025-09-02list: add list_last_entry_or_null()Luca Ceresoli1-0/+14
Add an equivalent of list_first_entry_or_null() to obtain the last element of a list. Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20250801-drm-bridge-alloc-getput-drm_bridge_get_next_bridge-v2-1-888912b0be13@bootlin.com Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
2025-09-02drm/debugfs: bridges_show: show refcountLuca Ceresoli1-0/+3
Now that bridges are refcounted, exposing the refcount in debugfs can be useful. Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250819-drm-bridge-debugfs-removed-v7-1-970702579978@bootlin.com Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
2025-09-02drm/sched: Fix racy access to drm_sched_entity.dependencyPierre-Eric Pelloux-Prayer1-4/+7
The drm_sched_job_unschedulable trace point can access entity->dependency after it was cleared by the callback installed in drm_sched_entity_add_dependency_cb, causing: BUG: kernel NULL pointer dereference, address: 0000000000000020 [...] Workqueue: comp_1.1.0 drm_sched_run_job_work [gpu_sched] RIP: 0010:trace_event_raw_event_drm_sched_job_unschedulable+0x70/0xd0 [gpu_sched] To fix this we either need to keep a reference to the fence before setting up the callbacks, or move the trace_drm_sched_job_unschedulable calls into drm_sched_entity_add_dependency_cb where they can be done earlier. Fixes: 76d97c870f29 ("drm/sched: Trace dependencies for GPU jobs") Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Signed-off-by: Philipp Stanner <phasta@kernel.org> Link: https://lore.kernel.org/r/20250901124032.1955-1-pierre-eric.pelloux-prayer@amd.com
2025-09-01drm/ssd130x: Remove the use of dev_err_probe()Liao Yuanhong1-2/+1
Logging messages that show some type of "out of memory" error are generally unnecessary as there is a generic message and a stack dump done by the memory subsystem. These messages generally increase kernel size without much added value[1]. The dev_err_probe() doesn't do anything when error is '-ENOMEM'. Therefore, remove the useless call to dev_err_probe(), and just return the value instead. [1]: https://lore.kernel.org/lkml/1402419340.30479.18.camel@joe-AO725/ Signed-off-by: Liao Yuanhong <liaoyuanhong@vivo.com> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://lore.kernel.org/r/20250820131416.500048-1-liaoyuanhong@vivo.com Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
2025-09-01drm/st7571-i2c: add support for 2bit grayscale for XRGB8888Marcus Folkesson1-13/+13
Add support for 2bit grayscale and use it for XRGB8888 when grayscale is supported. Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Link: https://lore.kernel.org/r/20250721-st7571-format-v2-6-159f4134098c@gmail.com Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
2025-09-01drm/format-helper: introduce drm_fb_xrgb8888_to_gray2()Marcus Folkesson2-0/+112
Convert XRGB8888 to 2bit grayscale. It uses drm_fb_xrgb8888_to_gray8() to convert the pixels to gray8 as an intermediate step before converting to gray2. Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://lore.kernel.org/r/20250721-st7571-format-v2-5-159f4134098c@gmail.com Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
2025-09-01drm/st7571-i2c: add support for inverted pixel formatMarcus Folkesson1-2/+5
Depending on which display that is connected to the controller, an "1" means either a black or a white pixel. The supported formats (R1/R2/XRGB8888) expects the pixels to map against (4bit): 00 => Black 01 => Dark Gray 10 => Light Gray 11 => White If this is not what the display map against, make it possible to invert the pixels. Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Link: https://lore.kernel.org/r/20250721-st7571-format-v2-4-159f4134098c@gmail.com Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
2025-09-01dt-bindings: display: sitronix,st7567: add optional inverted propertyMarcus Folkesson1-0/+5
Depending on which display that is connected to the controller, an "1" means either a black or a white pixel. The supported format (R1) expects the pixels to map against: 0 => Black 1 => White If this is not what the display map against, the controller has support to invert these values. Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://lore.kernel.org/r/20250721-st7571-format-v2-3-159f4134098c@gmail.com Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
2025-09-01dt-bindings: display: sitronix,st7571: add optional inverted propertyMarcus Folkesson1-0/+5
Depending on which display that is connected to the controller, an "1" means either a black or a white pixel. The supported formats (R1/R2/XRGB8888) expects the pixels to map against (4bit): 00 => Black 01 => Dark Gray 10 => Light Gray 11 => White If this is not what the display map against, the controller has support to invert these values. Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250721-st7571-format-v2-2-159f4134098c@gmail.com Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
2025-09-01drm/st7571-i2c: correct pixel data format descriptionMarcus Folkesson1-4/+4
The comment describes the pixel data format as stated in the st7571 datasheet, which is not necessary the same as for the connected display. Instead, describe the expected pixel data format which is used for R1/R2/XRGB8888. Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Link: https://lore.kernel.org/r/20250721-st7571-format-v2-1-159f4134098c@gmail.com Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
2025-09-01drm/imagination: Enable PowerVR driver for RISC-VMichal Wilczynski1-1/+2
Several RISC-V boards feature Imagination GPUs that are compatible with the PowerVR driver. An example is the IMG BXM-4-64 GPU on the Lichee Pi 4A board. This commit adjusts the driver's Kconfig dependencies to allow the PowerVR driver to be compiled on the RISC-V architecture. By enabling compilation on RISC-V, we expand support for these GPUs, providing graphics acceleration capabilities and enhancing hardware compatibility on RISC-V platforms. The RISC-V support is restricted to 64-bit systems (RISCV && 64BIT) as the driver currently has an implicit dependency on a 64-bit platform. Add a dependency on MMU to fix a build warning on RISC-V configurations without an MMU. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Matt Coster <matt.coster@imgtec.com> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Link: https://lore.kernel.org/r/20250822-apr_14_for_sending-v13-4-af656f7cc6c3@samsung.com Signed-off-by: Matt Coster <matt.coster@imgtec.com>
2025-09-01dt-bindings: gpu: img,powervr-rogue: Add TH1520 GPU supportMichal Wilczynski1-8/+29
Rework the PowerVR Rogue GPU binding to use an explicit, per variant style for defining power domain properties and add support for the T-HEAD TH1520 SoC's GPU. To improve clarity and precision, the binding is refactored so that power domain items are listed explicitly for each variant [1]. The previous method relied on an implicit, positional mapping between the `power-domains` and `power-domain-names` properties. This change replaces the generic rules with self contained if/then blocks for each GPU variant, making the relationship between power domains and their names explicit and unambiguous. The generic if block for img,img-rogue, which previously required power-domains and power-domain-names for all variants, is removed. Instead, each specific GPU variant now defines its own power domain requirements within a self-contained if/then block, making the schema more explicit. This new structure is then used to add support for the `thead,th1520-gpu`. While its BXM-4-64 IP has two conceptual power domains, the TH1520 SoC integrates them behind a single power gate. The new binding models this with a specific rule that enforces a single `power-domains` entry and disallows the `power-domain-names` property. Link: https://lore.kernel.org/all/4d79c8dd-c5fb-442c-ac65-37e7176b0cdd@linaro.org/ [1] Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Matt Coster <matt.coster@imgtec.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Link: https://lore.kernel.org/r/20250822-apr_14_for_sending-v13-2-af656f7cc6c3@samsung.com Signed-off-by: Matt Coster <matt.coster@imgtec.com>
2025-09-01drm/imagination: Use pwrseq for TH1520 GPU power managementMichal Wilczynski5-59/+176
Update the Imagination PVR DRM driver to leverage the pwrseq framework for managing the complex power sequence of the GPU on the T-HEAD TH1520 SoC. To cleanly separate platform-specific logic from the generic driver, this patch introduces an `init` callback to the `pwr_power_sequence_ops` struct. This allows for different power management strategies to be selected at probe time based on the device's compatible string. A `pvr_device_data` struct, associated with each compatible in the of_device_id table, points to the appropriate ops table (manual or pwrseq). At probe time, the driver now calls the `->init()` op. For pwrseq-based platforms, this callback calls `devm_pwrseq_get("gpu-power")`, deferring probe if the sequencer is not yet available. For other platforms, it falls back to the existing manual clock and reset handling. The runtime PM callbacks continue to call the appropriate functions via the ops table. Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Matt Coster <matt.coster@imgtec.com> Link: https://lore.kernel.org/r/20250822-apr_14_for_sending-v13-1-af656f7cc6c3@samsung.com Signed-off-by: Matt Coster <matt.coster@imgtec.com>
2025-09-01accel/ivpu: Make function parameter names consistentJacek Lawrynowicz2-2/+2
Make ivpu_hw_btrs_dct_set_status() and ivpu_fw_boot_params_setup() declaration and definition parameter names consistent. Reviewed-by: Lizhi Hou <lizhi.hou@amd.com> Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Link: https://lore.kernel.org/r/20250808111014.328607-1-jacek.lawrynowicz@linux.intel.com
2025-09-01accel/ivpu: Remove unused PLL_CONFIG_DEFAULTJacek Lawrynowicz1-2/+1
This change removes the unnecessary condition, makes the code clearer, and silences clang-tidy warning. Reviewed-by: Lizhi Hou <lizhi.hou@amd.com> Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Link: https://lore.kernel.org/r/20250808111044.328800-1-jacek.lawrynowicz@linux.intel.com
2025-09-01MAINTAINERS: adjust file entry in DRM ACCEL DRIVER FOR ROCKCHIP NPULukas Bulwahn1-1/+1
Commit a7352c849492 ("dt-bindings: npu: rockchip,rknn: Add bindings") adds the device-tree binding rockchip,rk3588-rknn-core.yaml, whereas the commit ed98261b4168 ("accel/rocket: Add a new driver for Rockchip's NPU") adds the section DRM ACCEL DRIVER FOR ROCKCHIP NPU in MAINTAINERS with a file entry referring to rockchip,rknn-core.yaml. Note that the file entry is missing the part rk3588, compared to the added file above, which it intends to refer to. Adjust the file entry to the intended file name. Fixes: ed98261b4168 ("accel/rocket: Add a new driver for Rockchip's NPU") Signed-off-by: Lukas Bulwahn <lukas.bulwahn@redhat.com> Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net> Link: https://lore.kernel.org/r/20250826063248.32153-1-lukas.bulwahn@redhat.com
2025-09-01accel/rocket: Fix some error checking in rocket_core_init()Dan Carpenter1-1/+1
The problem is that pm_runtime_get_sync() can return 1 on success so checking for zero doesn't work. Use the pm_runtime_resume_and_get() function instead. The pm_runtime_resume_and_get() function does additional cleanup as well so that's a bonus as well. Fixes: 0810d5ad88a1 ("accel/rocket: Add job submission IOCTL") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net> Link: https://lore.kernel.org/r/aKcRW6fsRP_o5C_y@stanley.mountain
2025-09-01accel/rocket: Check the correct DMA irq status to warn aboutHeiko Stuebner1-1/+1
Right now, the code checks the DMA_READ_ERROR state 2 times, while I guess it was supposed to warn about both read and write errors. Change the 2nd check to look at the write-error flag. Fixes: 0810d5ad88a1 ("accel/rocket: Add job submission IOCTL") Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net> Link: https://lore.kernel.org/r/20250818185658.2585696-1-heiko@sntech.de
2025-09-01accel/rocket: Fix usages of kfree() and sizeof()Brigham Campbell1-3/+4
Replace usages of kfree() with kvfree() for pointers which were allocated using kvmalloc(), as required by the kernel memory management API. Use sizeof() on the type that a pointer references instead of the pointer itself. In this case, scheds and *scheds both happen to be pointers, so sizeof() will expand to the same value in either case, but using *scheds is more technically correct since scheds is an array of drm_gpu_scheduler *. Reported-by: kernel test robot <lkp@intel.com> Reported-by: Julia Lawall <julia.lawall@inria.fr> Closes: https://lore.kernel.org/r/202508120730.PLbjlKbI-lkp@intel.com/ Signed-off-by: Brigham Campbell <me@brighamcampbell.com> Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net> Link: https://lore.kernel.org/r/20250813-rocket-free-fix-v1-1-51f00a7a1271@brighamcampbell.com Fixes: 0810d5ad88a1 ("accel/rocket: Add job submission IOCTL")
2025-09-01accel/rocket: Depend on DRM_ACCEL not just DRMHeiko Stuebner1-1/+1
With the current dependency on only DRM, a config of CONFIG_DRM_ACCEL_ROCKET=y is possible, but of course wrong, because without DRM_ACCEL the build- system will never even enter drivers/accel/* . So depend on DRM_ACCEL instead of just DRM. Fixes: ed98261b4168 ("accel/rocket: Add a new driver for Rockchip's NPU") Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net> Link: https://lore.kernel.org/r/20250814113519.1551855-3-heiko@sntech.de
2025-09-01accel/rocket: Fix indentation of Kconfig entryHeiko Stuebner1-8/+8
The general indentation for the Kconfig lines is one tab, so adapt the lines accordingly. The description is correctly indented (1 tab + 2 spaces) so doesn't need changes. Fixes: ed98261b4168 ("accel/rocket: Add a new driver for Rockchip's NPU") Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net> Link: https://lore.kernel.org/r/20250814113519.1551855-2-heiko@sntech.de
2025-09-01drm/rcar-du: dsi: Fix 1/2/3 lane supportMarek Vasut2-5/+8
Remove fixed PPI lane count setup. The R-Car DSI host is capable of operating in 1..4 DSI lane mode. Remove the hard-coded 4-lane configuration from PPI register settings and instead configure the PPI lane count according to lane count information already obtained by this driver instance. Configure TXSETR register to match PPI lane count. The R-Car V4H Reference Manual R19UH0186EJ0121 Rev.1.21 section 67.2.2.3 Tx Set Register (TXSETR), field LANECNT description indicates that the TXSETR register LANECNT bitfield lane count must be configured such, that it matches lane count configuration in PPISETR register DLEN bitfield. Make sure the LANECNT and DLEN bitfields are configured to match. Fixes: 155358310f01 ("drm: rcar-du: Add R-Car DSI driver") Cc: stable@vger.kernel.org Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20250813210840.97621-1-marek.vasut+renesas@mailbox.org Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2025-09-01drm/sitronix/st7571-i2c: Make st7571_panel_data variables static constJavier Martinez Canillas1-2/+2
The kernel test robot reported that sparse gives the following warnings: make C=2 M=drivers/gpu/drm/sitronix/ CC [M] st7571-i2c.o CHECK st7571-i2c.c st7571-i2c.c:1027:26: warning: symbol 'st7567_config' was not declared. Should it be static? st7571-i2c.c:1039:26: warning: symbol 'st7571_config' was not declared. Should it be static? MODPOST Module.symvers LD [M] st7571-i2c.ko Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202507180503.nfyD9uRv-lkp@intel.com Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250718152534.729770-1-javierm@redhat.com Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
2025-09-01drm/tidss: dispc: Define field masks being usedMaxime Ripard2-61/+154
Now that we have all the accessors taking masks, we can create defines for them and reuse them as needed. It makes the driver easier to read, less prone to consistency issues, and allows to reuse defines when needed. Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-14-7689b664cc63@kernel.org Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2025-09-01drm/tidss: dispc: Switch OVR_REG_FLD_MOD to using a maskMaxime Ripard1-13/+13
The OVR_REG_FLD_MOD function takes the start and end bits as parameter and will generate a mask out of them. This makes it difficult to share the masks between callers, since we now need two arguments and to keep them consistent. Let's change OVR_REG_FLD_MOD to take the mask as an argument instead, and let the caller create the mask. Eventually, this mask will be moved to a define. Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-13-7689b664cc63@kernel.org Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2025-09-01drm/tidss: dispc: Switch VP_REG_FLD_MOD to using a maskMaxime Ripard1-12/+17
The VP_REG_FLD_MOD function takes the start and end bits as parameter and will generate a mask out of them. This makes it difficult to share the masks between callers, since we now need two arguments and to keep them consistent. Let's change VP_REG_FLD_MOD to take the mask as an argument instead, and let the caller create the mask. Eventually, this mask will be moved to a define. Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-12-7689b664cc63@kernel.org Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2025-09-01drm/tidss: dispc: Switch VP_REG_GET to using a maskMaxime Ripard1-5/+5
The VP_REG_GET function takes the start and end bits as parameter and will generate a mask out of them. This makes it difficult to share the masks between callers, since we now need two arguments and to keep them consistent. Let's change VP_REG_GET to take the mask as an argument instead, and let the caller create the mask. Eventually, this mask will be moved to a define. Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-11-7689b664cc63@kernel.org Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2025-09-01drm/tidss: dispc: Switch VID_REG_FLD_MOD to using a maskMaxime Ripard1-15/+17
The VID_REG_FLD_MOD function takes the start and end bits as parameter and will generate a mask out of them. This makes it difficult to share the masks between callers, since we now need two arguments and to keep them consistent. Let's change VID_REG_FLD_MOD to take the mask as an argument instead, and let the caller create the mask. Eventually, this mask will be moved to a define. Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-10-7689b664cc63@kernel.org Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2025-09-01drm/tidss: dispc: Switch VID_REG_GET to using a maskMaxime Ripard1-4/+4
The VID_REG_GET function takes the start and end bits as parameter and will generate a mask out of them. This makes it difficult to share the masks between callers, since we now need two arguments and to keep them consistent. Let's change VID_REG_GET to take the mask as an argument instead, and let the caller create the mask. Eventually, this mask will be moved to a define. Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-9-7689b664cc63@kernel.org Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2025-09-01drm/tidss: dispc: Switch REG_FLD_MOD to using a maskMaxime Ripard1-9/+9
The REG_FLD_MOD function takes the start and end bits as parameter and will generate a mask out of them. This makes it difficult to share the masks between callers, since we now need two arguments and to keep them consistent. Let's change REG_FLD_MOD to take the mask as an argument instead, and let the caller create the mask. Eventually, this mask will be moved to a define. Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-8-7689b664cc63@kernel.org Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2025-09-01drm/tidss: dispc: Switch REG_GET to using a maskMaxime Ripard1-11/+10
The REG_GET function takes the start and end bits as parameter and will generate a mask out of them. This makes it difficult to share the masks between callers, since we now need two arguments and to keep them consistent. Let's change REG_GET to take the mask as an argument instead, and let the caller create the mask. Eventually, this mask will be moved to a define. Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-7-7689b664cc63@kernel.org Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2025-09-01drm/tidss: dispc: Get rid of FLD_MODMaxime Ripard1-22/+14
The FLD_MOD function is an equivalent to what FIELD_MODIFY + GENMASK provide, so let's drop it and switch to the latter. Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-6-7689b664cc63@kernel.org Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2025-09-01drm/tidss: dispc: Get rid of FLD_GETMaxime Ripard1-10/+6
The FLD_GET function is an equivalent to what FIELD_GET + GENMASK provide, so let's drop it and switch to the latter. Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-5-7689b664cc63@kernel.org Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2025-09-01drm/tidss: dispc: Get rid of FLD_VALMaxime Ripard1-32/+26
The FLD_VAL function is an equivalent to what FIELD_PREP + GENMASK provide, so let's drop it and switch to the latter. Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-4-7689b664cc63@kernel.org Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2025-09-01drm/tidss: dispc: Switch to GENMASK instead of FLD_MASKMaxime Ripard1-10/+3
The dispc FLD_MASK function is an exact equivalent of the GENMASK macro. Let's convert the dispc driver to the latter. Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-3-7689b664cc63@kernel.org Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2025-09-01drm/tidss: dispc: Convert accessors to macrosMaxime Ripard1-66/+76
The dispc driver uses upper-cased, inlined, functions to provide macro-like accessors to the dispc registers. This is confusing, since upper-case is usually used by macros, and that pattern will create gcc errors later on in this series. Let's switch to macros to make it more consistent, and prevent those errors down the line. Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-2-7689b664cc63@kernel.org Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2025-09-01drm/tidss: dispc: Remove unused OVR_REG_GETMaxime Ripard1-7/+0
The OVR_REG_GET function in the dispc driver is not used anywhere. Let's drop it. Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-1-7689b664cc63@kernel.org Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2025-09-01drm/gud: Replace simple display pipe with DRM atomic helpersRuben Wauters4-55/+99
The simple display pipe is obsolete and the atomic helpers allow for more control over the rendering process. As such, this patch replaces the old simple display pipe system with the newer atomic helpers. As the code is mainly the same, merely replaced with the new atomic system, there should be no change in functionality. Signed-off-by: Ruben Wauters <rubenru09@aol.com> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://lore.kernel.org/r/20250818193553.2162-1-rubenru09@aol.com
2025-09-01drm/amdgpu: give each kernel job a unique idPierre-Eric Pelloux-Prayer19-41/+84
Userspace jobs have drm_file.client_id as a unique identifier as job's owners. For kernel jobs, we can allocate arbitrary values - the risk of overlap with userspace ids is small (given that it's a u64 value). In the unlikely case the overlap happens, it'll only impact trace events. Since this ID is traced in the gpu_scheduler trace events, this allows to determine the source of each job sent to the hardware. To make grepping easier, the IDs are defined as they will appear in the trace output. Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Link: https://lore.kernel.org/r/20250604122827.2191-1-pierre-eric.pelloux-prayer@amd.com
2025-08-29drm/nouveau: Replace redundant return value judgment with PTR_ERR_OR_ZERO()Liao Yuanhong1-4/+1
Replace redundant return value judgment with PTR_ERR_OR_ZERO() to enhance code readability. Signed-off-by: Liao Yuanhong <liaoyuanhong@vivo.com> Signed-off-by: Lyude Paul <lyude@redhat.com> Link: https://lore.kernel.org/r/20250815133643.418089-1-liaoyuanhong@vivo.com
2025-08-29accel/amdxdna: Use int instead of u32 to store error codesQianfeng Rong1-3/+3
Change the 'ret' variable from u32 to int to store -EINVAL. Storing the negative error codes in unsigned type, doesn't cause an issue at runtime but it's ugly as pants. Additionally, assigning -EINVAL to u32 ret (i.e., u32 ret = -EINVAL) may trigger a GCC warning when the -Wsign-conversion flag is enabled. Fixes: aac243092b70 ("accel/amdxdna: Add command execution") Signed-off-by: Qianfeng Rong <rongqianfeng@vivo.com> Reviewed-by: Lizhi Hou <lizhi.hou@amd.com> Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Link: https://lore.kernel.org/r/20250828033917.113364-1-rongqianfeng@vivo.com
2025-08-29drm/test: drm_exec: use kzalloc() to allocate GEM objectsDanilo Krummrich1-7/+15
Since commit e7fa80e2932c ("drm_gem: add mutex to drm_gem_object.gpuva") it is possible for test_prepare_array() to exceed a stack frame size of 2048 bytes depending on the exact configuration of the kernel. drivers/gpu/drm/tests/drm_exec_test.c: In function ‘test_prepare_array’: drivers/gpu/drm/tests/drm_exec_test.c:171:1: error: the frame size of 2128 bytes is larger than 2048 bytes [-Werror=frame-larger-than=] 171 | } | ^ cc1: all warnings being treated as errors make[6]: *** [scripts/Makefile.build:287: drivers/gpu/drm/tests/drm_exec_test.o] Error 1 make[6]: *** Waiting for unfinished jobs.... In order to fix this, allocate the GEM objects in test_prepare_array() with kzalloc(), rather than placing them on the stack. Cc: Alice Ryhl <aliceryhl@google.com> Cc: Christian König <christian.koenig@amd.com> Fixes: e7fa80e2932c ("drm_gem: add mutex to drm_gem_object.gpuva") Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alice Ryhl <aliceryhl@google.com> Reviewed-by: Nirmoy Das <nirmoyd@nvidia.com> Link: https://lore.kernel.org/r/20250829075633.2306-1-dakr@kernel.org [ Use kunit_kzalloc() instead of kzalloc(). - Danilo ] Signed-off-by: Danilo Krummrich <dakr@kernel.org>