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2024-11-12drm/i915/hdcp: Fix when the first read and write are retriedSuraj Kandpal1-12/+20
2024-11-12drm/i915/scaler: Extract intel_allocate_scaler()Ville Syrjälä1-12/+19
2024-11-12drm/i915/scaler: Make scaler in_use a boolVille Syrjälä2-5/+5
2024-11-12drm/i915/scaler: Carve up intel_atomic_setup_scalers()Ville Syrjälä1-36/+56
2024-11-12drm/i915/scaler: Convert the scaler code to intel_displayVille Syrjälä1-52/+53
2024-11-12drm/i915/scaler: Clean up intel_atomic_setup_scalers() a bitVille Syrjälä1-40/+20
2024-11-12drm/i915/scaler: Pass the whole atomic state into intel_atomic_setup_scalers()Ville Syrjälä3-15/+13
2024-11-12drm/i915/scaler: Remove redudant junk from skl_scaler.hVille Syrjälä1-4/+0
2024-11-12drm/i915/scaler: s/intel_crtc/crtc/ etc.Ville Syrjälä2-18/+17
2024-11-11drm/i915/crt: Nuke unused crt->connectorVille Syrjälä1-5/+0
2024-11-11drm/i915/crt: Rename some variablesVille Syrjälä1-24/+20
2024-11-11drm/i915/crt: Drop pointless drm_device variablesVille Syrjälä1-10/+5
2024-11-11drm/i915/crt: s/pipe_config/crtc_state/Ville Syrjälä1-31/+31
2024-11-11drm/i915/crt: Extract intel_crt_regs.hVille Syrjälä7-38/+53
2024-11-11drm/i915/crt: Clean up ADPA_HOTPLUG_BITS definitionsVille Syrjälä2-5/+12
2024-11-11drm/i915/crt: Use REG_BIT() & co.Ville Syrjälä2-38/+35
2024-11-11drm/i915/crt: Drop the unused ADPA_DPMS bit definitionsVille Syrjälä1-5/+0
2024-11-11drm/i915/crt: Split long lineVille Syrjälä1-1/+3
2024-11-11drm/i915: Grab intel_display from the encoder to avoid potential oopsiesVille Syrjälä2-7/+7
2024-11-11drm/i915/psr: stop using bitwise OR with booleans in wm_optimization_wa()Jani Nikula1-7/+8
2024-11-11drm/i915/psr: add LATENCY_REPORTING_REMOVED() register bit helperJani Nikula2-24/+13
2024-11-11drm/i915/dp: demote source OUI read/write failure logging to debugJani Nikula1-3/+3
2024-11-08drm/i915/xe3lpd: Use DMC wakelock by defaultGustavo Sousa3-5/+9
2024-11-08drm/i915/dmc_wl: Sanitize enable_dmc_wl according to hardware supportGustavo Sousa1-7/+14
2024-11-08drm/i915/dmc_wl: Add and use HAS_DMC_WAKELOCK()Gustavo Sousa2-2/+3
2024-11-08drm/i915/dmc_wl: Couple enable/disable with dynamic DC statesGustavo Sousa3-7/+8
2024-11-08drm/i915/dmc_wl: Deal with existing references when disablingGustavo Sousa1-30/+67
2024-11-08drm/i915/dmc_wl: Allow simpler syntax for single reg in range tablesGustavo Sousa1-58/+60
2024-11-08drm/i915/dmc_wl: Track registers touched by the DMCGustavo Sousa3-13/+128
2024-11-08drm/i915/dmc_wl: Rename lnl_wl_range to powered_off_rangesGustavo Sousa1-2/+6
2024-11-08drm/i915/dmc_wl: Extract intel_dmc_wl_reg_in_range()Gustavo Sousa1-10/+11
2024-11-08drm/i915/dmc_wl: Use sentinel item for range tablesGustavo Sousa1-1/+2
2024-11-08drm/i915/dmc_wl: Get wakelock when disabling dynamic DC statesGustavo Sousa3-5/+21
2024-11-08drm/i915/dmc_wl: Check for non-zero refcount in release workGustavo Sousa1-2/+5
2024-11-08drm/i915/dmc_wl: Use non-sleeping variant of MMIO waitGustavo Sousa2-8/+26
2024-11-08drm/xe: Mimic i915 behavior for non-sleeping MMIO waitGustavo Sousa1-1/+10
2024-11-08drm/i915/dmc_wl: Use i915_mmio_reg_offset() instead of reg.regGustavo Sousa1-5/+6
2024-11-08drm/i915/psr: Disable Panel Replay as well if VRR is enabledJouni Högander1-7/+6
2024-11-07drm/i915/hdcp: Handle HDCP Line Rekeying for HDCP 1.4Suraj Kandpal1-15/+22
2024-11-07drm/i915/cdclk: Unify cdclk max() parameter orderVille Syrjälä3-14/+14
2024-11-07drm/i915/cdclk: Relocate intel_vdsc_min_cdclk()Ville Syrjälä3-46/+47
2024-11-07drm/i915/cdclk: Drop pointles max_t() usage in intel_vdsc_min_cdclk()Ville Syrjälä1-3/+2
2024-11-07drm/i915/cdclk: Suck the compression_enable check into intel_vdsc_min_cdclk()Ville Syrjälä1-3/+4
2024-11-07drm/i915/cdclk: Factor out INTEL_OUTPUT_DSI check in vlv_dsi_min_cdclk()Ville Syrjälä1-8/+8
2024-11-07drm/i915/cdclk: Extract vlv_dsi_min_cdclk()Ville Syrjälä3-21/+33
2024-11-07drm/i915/cdclk: Factor out has_audio check in intel_audio_min_cdclk()Ville Syrjälä1-3/+5
2024-11-07drm/i915/cdclk: Extract intel_audio_min_cdclk()Ville Syrjälä3-36/+47
2024-11-07drm/i915/cdclk: Extract hsw_ips_min_cdclk()Ville Syrjälä3-8/+19
2024-11-07drm/i915/cdclk: Extract intel_cdclk_guardband() and intel_cdclk_ppc()Ville Syrjälä1-24/+26
2024-11-07drm/i915: Introduce HAS_DOUBLE_WIDE()Ville Syrjälä3-3/+4
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