From 57b38c3c69da1369228b5fda656947cbf29c5a43 Mon Sep 17 00:00:00 2001 From: Benson Leung Date: Thu, 30 Jan 2025 01:47:12 +0000 Subject: MAINTAINERS: Update maintainers for ChromeOS USBC related drivers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a few new members of ChromeOS USB team for the USB Type-C related drivers for ChromeOS: cros_ec_typec, cros_ec_ucsi, and cros_usbpd_notify. Łukasz Bartosik Jameson Thies Andrei Kuchynski Prashant has also moved to a different team, so by his request, remove him from maintainers of these drivers too. Signed-off-by: Benson Leung Link: https://lore.kernel.org/r/Z5raIM_qhCF7oOB8@google.com Signed-off-by: Tzung-Bi Shih --- MAINTAINERS | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 896a307fa065..45c4b3ebfccb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5481,16 +5481,19 @@ S: Maintained F: drivers/platform/chrome/cros_ec_uart.c CHROMEOS EC USB PD NOTIFY DRIVER -M: Prashant Malani +M: Łukasz Bartosik +M: Andrei Kuchynski +M: Jameson Thies L: chrome-platform@lists.linux.dev S: Maintained F: drivers/platform/chrome/cros_usbpd_notify.c F: include/linux/platform_data/cros_usbpd_notify.h CHROMEOS EC USB TYPE-C DRIVER -M: Prashant Malani M: Benson Leung M: Abhishek Pandit-Subedi +M: Jameson Thies +M: Andrei Kuchynski L: chrome-platform@lists.linux.dev S: Maintained F: drivers/platform/chrome/cros_ec_typec.* @@ -5513,6 +5516,8 @@ F: drivers/watchdog/cros_ec_wdt.c CHROMEOS UCSI DRIVER M: Abhishek Pandit-Subedi M: Łukasz Bartosik +M: Jameson Thies +M: Andrei Kuchynski L: chrome-platform@lists.linux.dev S: Maintained F: drivers/usb/typec/ucsi/cros_ec_ucsi.c -- cgit v1.2.3 From d83c45aeec9b223fe6db4175e9d1c4f5699cc37a Mon Sep 17 00:00:00 2001 From: Daniel Schaefer Date: Wed, 29 Jan 2025 02:13:29 +0800 Subject: platform/chrome: cros_ec_lpc: Match on Framework ACPI device Load the cros_ec_lpc driver based on a Framework FRMWC004 ACPI device, which mirrors GOOG0004, but also applies npcx quirks for Framework systems. Matching on ACPI will let us avoid having to change the SMBIOS match rules again and again. Cc: Tzung-Bi Shih Cc: linux@frame.work Cc: Dustin L. Howett Signed-off-by: Daniel Schaefer Link: https://lore.kernel.org/r/20250128181329.8070-1-dhs@frame.work Signed-off-by: Tzung-Bi Shih --- drivers/platform/chrome/cros_ec_lpc.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/platform/chrome/cros_ec_lpc.c b/drivers/platform/chrome/cros_ec_lpc.c index 5a2f1d98b350..be319949b941 100644 --- a/drivers/platform/chrome/cros_ec_lpc.c +++ b/drivers/platform/chrome/cros_ec_lpc.c @@ -30,6 +30,7 @@ #define DRV_NAME "cros_ec_lpcs" #define ACPI_DRV_NAME "GOOG0004" +#define FRMW_ACPI_DRV_NAME "FRMWC004" /* True if ACPI device is present */ static bool cros_ec_lpc_acpi_device_found; @@ -514,7 +515,7 @@ static int cros_ec_lpc_probe(struct platform_device *pdev) acpi_status status; struct cros_ec_device *ec_dev; struct cros_ec_lpc *ec_lpc; - struct lpc_driver_data *driver_data; + const struct lpc_driver_data *driver_data; u8 buf[2] = {}; int irq, ret; u32 quirks; @@ -526,6 +527,9 @@ static int cros_ec_lpc_probe(struct platform_device *pdev) ec_lpc->mmio_memory_base = EC_LPC_ADDR_MEMMAP; driver_data = platform_get_drvdata(pdev); + if (!driver_data) + driver_data = acpi_device_get_match_data(dev); + if (driver_data) { quirks = driver_data->quirks; @@ -696,12 +700,6 @@ static void cros_ec_lpc_remove(struct platform_device *pdev) cros_ec_unregister(ec_dev); } -static const struct acpi_device_id cros_ec_lpc_acpi_device_ids[] = { - { ACPI_DRV_NAME, 0 }, - { } -}; -MODULE_DEVICE_TABLE(acpi, cros_ec_lpc_acpi_device_ids); - static const struct lpc_driver_data framework_laptop_npcx_lpc_driver_data __initconst = { .quirks = CROS_EC_LPC_QUIRK_REMAP_MEMORY, .quirk_mmio_memory_base = 0xE00, @@ -713,6 +711,13 @@ static const struct lpc_driver_data framework_laptop_mec_lpc_driver_data __initc .quirk_aml_mutex_name = "ECMT", }; +static const struct acpi_device_id cros_ec_lpc_acpi_device_ids[] = { + { ACPI_DRV_NAME, 0 }, + { FRMW_ACPI_DRV_NAME, (kernel_ulong_t)&framework_laptop_npcx_lpc_driver_data }, + { } +}; +MODULE_DEVICE_TABLE(acpi, cros_ec_lpc_acpi_device_ids); + static const struct dmi_system_id cros_ec_lpc_dmi_table[] __initconst = { { /* @@ -866,7 +871,8 @@ static int __init cros_ec_lpc_init(void) int ret; const struct dmi_system_id *dmi_match; - cros_ec_lpc_acpi_device_found = !!cros_ec_lpc_get_device(ACPI_DRV_NAME); + cros_ec_lpc_acpi_device_found = !!cros_ec_lpc_get_device(ACPI_DRV_NAME) || + !!cros_ec_lpc_get_device(FRMW_ACPI_DRV_NAME); dmi_match = dmi_first_match(cros_ec_lpc_dmi_table); -- cgit v1.2.3 From e6a3215f78716d25ad60b002fd0585c04ffd5d01 Mon Sep 17 00:00:00 2001 From: Andrei Kuchynski Date: Mon, 3 Feb 2025 12:59:46 +0000 Subject: platform/chrome: cros_ec_sysfs: Expose PD mux status This adds sysfs attribute /sys/class/chromeos/cros_ec/usbpdmuxinfo to expose the PD mux status for each Type-C port. This allows user-space applications to easily determine the current mux state without using ioctls. Signed-off-by: Andrei Kuchynski Link: https://lore.kernel.org/r/20250203125947.2701106-2-akuchynski@chromium.org Signed-off-by: Tzung-Bi Shih --- Documentation/ABI/testing/sysfs-class-chromeos | 13 ++++++ drivers/platform/chrome/cros_ec_sysfs.c | 58 ++++++++++++++++++++++++++ 2 files changed, 71 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-class-chromeos b/Documentation/ABI/testing/sysfs-class-chromeos index 74ece942722e..e067dbdab170 100644 --- a/Documentation/ABI/testing/sysfs-class-chromeos +++ b/Documentation/ABI/testing/sysfs-class-chromeos @@ -31,3 +31,16 @@ Date: August 2015 KernelVersion: 4.2 Description: Show the information about the EC software and hardware. + +What: /sys/class/chromeos/cros_ec/usbpdmuxinfo +Date: February 2025 +Description: + Show PD mux status for each typec port with following flags: + - "USB": USB connected + - "DP": DP connected + - "POLARITY": CC line Polarity inverted + - "HPD_IRQ": Hot Plug Detect interrupt is asserted + - "HPD_LVL": Hot Plug Detect level is asserted + - "SAFE": DP is in safe mode + - "TBT": TBT enabled + - "USB4": USB4 enabled diff --git a/drivers/platform/chrome/cros_ec_sysfs.c b/drivers/platform/chrome/cros_ec_sysfs.c index bc1a5ba09528..93e9ed87249c 100644 --- a/drivers/platform/chrome/cros_ec_sysfs.c +++ b/drivers/platform/chrome/cros_ec_sysfs.c @@ -296,18 +296,69 @@ static ssize_t kb_wake_angle_store(struct device *dev, return count; } +static ssize_t usbpdmuxinfo_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct cros_ec_dev *ec = to_cros_ec_dev(dev); + ssize_t count = 0; + struct ec_response_usb_pd_ports resp_pd_ports; + int ret; + int i; + + ret = cros_ec_cmd(ec->ec_dev, 0, EC_CMD_USB_PD_PORTS, NULL, 0, + &resp_pd_ports, sizeof(resp_pd_ports)); + if (ret < 0) + return -EIO; + + for (i = 0; i < resp_pd_ports.num_ports; i++) { + struct ec_response_usb_pd_mux_info resp_mux; + struct ec_params_usb_pd_mux_info req = { + .port = i, + }; + + ret = cros_ec_cmd(ec->ec_dev, 0, EC_CMD_USB_PD_MUX_INFO, + &req, sizeof(req), &resp_mux, sizeof(resp_mux)); + + if (ret >= 0) { + count += sysfs_emit_at(buf, count, "Port %d:", i); + count += sysfs_emit_at(buf, count, " USB=%d", + !!(resp_mux.flags & USB_PD_MUX_USB_ENABLED)); + count += sysfs_emit_at(buf, count, " DP=%d", + !!(resp_mux.flags & USB_PD_MUX_DP_ENABLED)); + count += sysfs_emit_at(buf, count, " POLARITY=%s", + (resp_mux.flags & USB_PD_MUX_POLARITY_INVERTED) ? + "INVERTED" : "NORMAL"); + count += sysfs_emit_at(buf, count, " HPD_IRQ=%d", + !!(resp_mux.flags & USB_PD_MUX_HPD_IRQ)); + count += sysfs_emit_at(buf, count, " HPD_LVL=%d", + !!(resp_mux.flags & USB_PD_MUX_HPD_LVL)); + count += sysfs_emit_at(buf, count, " SAFE=%d", + !!(resp_mux.flags & USB_PD_MUX_SAFE_MODE)); + count += sysfs_emit_at(buf, count, " TBT=%d", + !!(resp_mux.flags & USB_PD_MUX_TBT_COMPAT_ENABLED)); + count += sysfs_emit_at(buf, count, " USB4=%d\n", + !!(resp_mux.flags & USB_PD_MUX_USB4_ENABLED)); + } + } + + return count ? : -EIO; +} + /* Module initialization */ static DEVICE_ATTR_RW(reboot); static DEVICE_ATTR_RO(version); static DEVICE_ATTR_RO(flashinfo); static DEVICE_ATTR_RW(kb_wake_angle); +static DEVICE_ATTR_RO(usbpdmuxinfo); static struct attribute *__ec_attrs[] = { &dev_attr_kb_wake_angle.attr, &dev_attr_reboot.attr, &dev_attr_version.attr, &dev_attr_flashinfo.attr, + &dev_attr_usbpdmuxinfo.attr, NULL, }; @@ -320,6 +371,13 @@ static umode_t cros_ec_ctrl_visible(struct kobject *kobj, if (a == &dev_attr_kb_wake_angle.attr && !ec->has_kb_wake_angle) return 0; + if (a == &dev_attr_usbpdmuxinfo.attr) { + struct cros_ec_platform *ec_platform = dev_get_platdata(ec->dev); + + if (strcmp(ec_platform->ec_name, CROS_EC_DEV_NAME)) + return 0; + } + return a->mode; } -- cgit v1.2.3 From 435a3d78b87a93c52a4f84e36ba4a0857554c958 Mon Sep 17 00:00:00 2001 From: Andrei Kuchynski Date: Mon, 3 Feb 2025 12:59:47 +0000 Subject: platform/chrome: cros_ec_sysfs: Expose AP_MODE_ENTRY feature state This adds sysfs attribute /sys/class/chromeos/cros_ec/ap_mode_entry to expose the status of the AP_MODE_ENTRY feature. This attribute indicate whether the EC requires direction from the Application Processor (AP) before entering Type-C alternate modes or USB4 mode. This allows user-space applications to easily determine if the AP needs to be involved in mode entry. Signed-off-by: Andrei Kuchynski Link: https://lore.kernel.org/r/20250203125947.2701106-3-akuchynski@chromium.org Signed-off-by: Tzung-Bi Shih --- Documentation/ABI/testing/sysfs-class-chromeos | 7 +++++++ drivers/platform/chrome/cros_ec_sysfs.c | 15 ++++++++++++++- 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/Documentation/ABI/testing/sysfs-class-chromeos b/Documentation/ABI/testing/sysfs-class-chromeos index e067dbdab170..7fa5be6cc774 100644 --- a/Documentation/ABI/testing/sysfs-class-chromeos +++ b/Documentation/ABI/testing/sysfs-class-chromeos @@ -44,3 +44,10 @@ Description: - "SAFE": DP is in safe mode - "TBT": TBT enabled - "USB4": USB4 enabled + +What: /sys/class/chromeos/cros_ec/ap_mode_entry +Date: February 2025 +Description: + Show if the AP mode entry EC feature is supported. + It indicates whether the EC waits for direction from the AP + to enter Type-C altmodes or USB4 mode. diff --git a/drivers/platform/chrome/cros_ec_sysfs.c b/drivers/platform/chrome/cros_ec_sysfs.c index 93e9ed87249c..f22e9523da3e 100644 --- a/drivers/platform/chrome/cros_ec_sysfs.c +++ b/drivers/platform/chrome/cros_ec_sysfs.c @@ -345,6 +345,16 @@ static ssize_t usbpdmuxinfo_show(struct device *dev, return count ? : -EIO; } +static ssize_t ap_mode_entry_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct cros_ec_dev *ec = to_cros_ec_dev(dev); + const bool ap_driven_altmode = cros_ec_check_features( + ec, EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY); + + return sysfs_emit(buf, "%s\n", ap_driven_altmode ? "yes" : "no"); +} + /* Module initialization */ static DEVICE_ATTR_RW(reboot); @@ -352,6 +362,7 @@ static DEVICE_ATTR_RO(version); static DEVICE_ATTR_RO(flashinfo); static DEVICE_ATTR_RW(kb_wake_angle); static DEVICE_ATTR_RO(usbpdmuxinfo); +static DEVICE_ATTR_RO(ap_mode_entry); static struct attribute *__ec_attrs[] = { &dev_attr_kb_wake_angle.attr, @@ -359,6 +370,7 @@ static struct attribute *__ec_attrs[] = { &dev_attr_version.attr, &dev_attr_flashinfo.attr, &dev_attr_usbpdmuxinfo.attr, + &dev_attr_ap_mode_entry.attr, NULL, }; @@ -371,7 +383,8 @@ static umode_t cros_ec_ctrl_visible(struct kobject *kobj, if (a == &dev_attr_kb_wake_angle.attr && !ec->has_kb_wake_angle) return 0; - if (a == &dev_attr_usbpdmuxinfo.attr) { + if (a == &dev_attr_usbpdmuxinfo.attr || + a == &dev_attr_ap_mode_entry.attr) { struct cros_ec_platform *ec_platform = dev_get_platdata(ec->dev); if (strcmp(ec_platform->ec_name, CROS_EC_DEV_NAME)) -- cgit v1.2.3 From 9fc83373f0ffb8834da48b1446a5c2fef9525bb1 Mon Sep 17 00:00:00 2001 From: Andrei Kuchynski Date: Mon, 10 Feb 2025 13:04:19 +0000 Subject: platform/chrome: cros_ec_typec: Add support for setting USB mode via sysfs This patch implements USB mode setting via a sysfs interface in cros_ec_typec driver. User-space applications can now change the current USB mode by writing to "usb_mode" sysfs entry, replacing the previous ioctl-based method. The embedded controller (EC) currently supports only entering USB4 mode and exiting all modes (including altmodes). Both of these operations trigger Data Reset Message, even if no USB Mode is active. Additionally, the patch exposes the USB modes supported by the port via "usb_capability" sysfs attribute. Signed-off-by: Andrei Kuchynski Link: https://lore.kernel.org/r/20250210130419.4110130-1-akuchynski@chromium.org Signed-off-by: Tzung-Bi Shih --- drivers/platform/chrome/cros_ec_typec.c | 28 ++++++++++++++++++++++++++++ drivers/platform/chrome/cros_ec_typec.h | 1 + 2 files changed, 29 insertions(+) diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c index 6ee182101bc9..d2228720991f 100644 --- a/drivers/platform/chrome/cros_ec_typec.c +++ b/drivers/platform/chrome/cros_ec_typec.c @@ -42,6 +42,24 @@ static void cros_typec_role_switch_quirk(struct fwnode_handle *fwnode) #endif } +static int cros_typec_enter_usb_mode(struct typec_port *tc_port, enum usb_mode mode) +{ + struct cros_typec_port *port = typec_get_drvdata(tc_port); + struct ec_params_typec_control req = { + .port = port->port_num, + .command = (mode == USB_MODE_USB4) ? + TYPEC_CONTROL_COMMAND_ENTER_MODE : TYPEC_CONTROL_COMMAND_EXIT_MODES, + .mode_to_enter = CROS_EC_ALTMODE_USB4 + }; + + return cros_ec_cmd(port->typec_data->ec, 0, EC_CMD_TYPEC_CONTROL, + &req, sizeof(req), NULL, 0); +} + +static const struct typec_operations cros_typec_usb_mode_ops = { + .enter_usb_mode = cros_typec_enter_usb_mode +}; + static int cros_typec_parse_port_props(struct typec_capability *cap, struct fwnode_handle *fwnode, struct device *dev) @@ -84,6 +102,13 @@ static int cros_typec_parse_port_props(struct typec_capability *cap, cap->prefer_role = ret; } + if (fwnode_property_present(fwnode, "usb2-port")) + cap->usb_capability |= USB_CAPABILITY_USB2; + if (fwnode_property_present(fwnode, "usb3-port")) + cap->usb_capability |= USB_CAPABILITY_USB3; + if (fwnode_property_present(fwnode, "usb4-port")) + cap->usb_capability |= USB_CAPABILITY_USB4; + cros_typec_role_switch_quirk(fwnode); cap->fwnode = fwnode; @@ -379,6 +404,9 @@ static int cros_typec_init_ports(struct cros_typec_data *typec) if (ret < 0) goto unregister_ports; + cap->driver_data = cros_port; + cap->ops = &cros_typec_usb_mode_ops; + cros_port->port = typec_register_port(dev, cap); if (IS_ERR(cros_port->port)) { ret = PTR_ERR(cros_port->port); diff --git a/drivers/platform/chrome/cros_ec_typec.h b/drivers/platform/chrome/cros_ec_typec.h index 9fd5342bb0ad..f9c31f04c102 100644 --- a/drivers/platform/chrome/cros_ec_typec.h +++ b/drivers/platform/chrome/cros_ec_typec.h @@ -18,6 +18,7 @@ enum { CROS_EC_ALTMODE_DP = 0, CROS_EC_ALTMODE_TBT, + CROS_EC_ALTMODE_USB4, CROS_EC_ALTMODE_MAX, }; -- cgit v1.2.3