From 3b218baa744b0c7161d1784414e0a9db6bc9bf6b Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 11 Mar 2021 16:25:31 +0100 Subject: clk: socfpga: allow building N5X clocks with ARCH_N5X The Intel's eASIC N5X (ARCH_N5X) architecture shares a lot with Agilex (ARCH_AGILEX) so it uses the same socfpga_agilex.dtsi, with minor changes. Also the clock drivers are the same. However the clock drivers won't be build without ARCH_AGILEX. One could assume that ARCH_N5X simply depends on ARCH_AGILEX but this was not modeled in Kconfig. In current stage the ARCH_N5X is simply unbootable. Add a separate Kconfig entry for clocks used by both ARCH_N5X and ARCH_AGILEX so the necessary objects will be built if either of them is selected. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/socfpga/Kconfig | 6 ++++++ drivers/clk/socfpga/Makefile | 4 ++-- 4 files changed, 10 insertions(+), 2 deletions(-) create mode 100644 drivers/clk/socfpga/Kconfig diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index a588d56502d4..1d1891b9cad2 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -394,6 +394,7 @@ source "drivers/clk/renesas/Kconfig" source "drivers/clk/rockchip/Kconfig" source "drivers/clk/samsung/Kconfig" source "drivers/clk/sifive/Kconfig" +source "drivers/clk/socfpga/Kconfig" source "drivers/clk/sprd/Kconfig" source "drivers/clk/sunxi/Kconfig" source "drivers/clk/sunxi-ng/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index b22ae4f81e0b..12e46b12e587 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -106,6 +106,7 @@ obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/ obj-$(CONFIG_CLK_SIFIVE) += sifive/ obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/ obj-$(CONFIG_ARCH_AGILEX) += socfpga/ +obj-$(CONFIG_ARCH_N5X) += socfpga/ obj-$(CONFIG_ARCH_STRATIX10) += socfpga/ obj-$(CONFIG_PLAT_SPEAR) += spear/ obj-y += sprd/ diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig new file mode 100644 index 000000000000..3c30617169bf --- /dev/null +++ b/drivers/clk/socfpga/Kconfig @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0 +config CLK_INTEL_SOCFPGA64 + bool + # Intel Agilex / N5X clock controller support + default (ARCH_AGILEX || ARCH_N5X) + depends on ARCH_AGILEX || ARCH_N5X diff --git a/drivers/clk/socfpga/Makefile b/drivers/clk/socfpga/Makefile index bf736f8d201a..c6db8dd4ab35 100644 --- a/drivers/clk/socfpga/Makefile +++ b/drivers/clk/socfpga/Makefile @@ -3,5 +3,5 @@ obj-$(CONFIG_ARCH_SOCFPGA) += clk.o clk-gate.o clk-pll.o clk-periph.o obj-$(CONFIG_ARCH_SOCFPGA) += clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o obj-$(CONFIG_ARCH_STRATIX10) += clk-s10.o obj-$(CONFIG_ARCH_STRATIX10) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o -obj-$(CONFIG_ARCH_AGILEX) += clk-agilex.o -obj-$(CONFIG_ARCH_AGILEX) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o +obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-agilex.o +obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o -- cgit v1.2.3 From 910499e13387fdd025a8113f2d9fc0207eae4848 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 11 Mar 2021 16:25:32 +0100 Subject: ARM: socfpga: introduce common ARCH_INTEL_SOCFPGA Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only one for both of them. This the common practice for other platforms. Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come from multiple vendors. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- arch/arm/Kconfig | 2 +- arch/arm/Kconfig.debug | 6 +++--- arch/arm/Makefile | 2 +- arch/arm/boot/dts/Makefile | 2 +- arch/arm/mach-socfpga/Kconfig | 4 ++++ arch/arm64/Kconfig.platforms | 4 ++++ arch/arm64/boot/dts/altera/Makefile | 2 +- 7 files changed, 15 insertions(+), 7 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 853aab5ab327..37f94cf0cfdb 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1320,7 +1320,7 @@ config ARM_PSCI # selected platforms. config ARCH_NR_GPIO int - default 2048 if ARCH_SOCFPGA + default 2048 if ARCH_INTEL_SOCFPGA default 1024 if ARCH_BRCMSTB || ARCH_RENESAS || ARCH_TEGRA || \ ARCH_ZYNQ || ARCH_ASPEED default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \ diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 9e0b5e7f12af..36016497b1b3 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -1087,7 +1087,7 @@ choice on SD5203 UART. config DEBUG_SOCFPGA_UART0 - depends on ARCH_SOCFPGA + depends on ARCH_INTEL_SOCFPGA bool "Use SOCFPGA UART0 for low-level debug" select DEBUG_UART_8250 help @@ -1095,7 +1095,7 @@ choice on SOCFPGA(Cyclone 5 and Arria 5) based platforms. config DEBUG_SOCFPGA_ARRIA10_UART1 - depends on ARCH_SOCFPGA + depends on ARCH_INTEL_SOCFPGA bool "Use SOCFPGA Arria10 UART1 for low-level debug" select DEBUG_UART_8250 help @@ -1103,7 +1103,7 @@ choice on SOCFPGA(Arria 10) based platforms. config DEBUG_SOCFPGA_CYCLONE5_UART1 - depends on ARCH_SOCFPGA + depends on ARCH_INTEL_SOCFPGA bool "Use SOCFPGA Cyclone 5 UART1 for low-level debug" select DEBUG_UART_8250 help diff --git a/arch/arm/Makefile b/arch/arm/Makefile index dad5502ecc28..415c3514573a 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -209,7 +209,7 @@ machine-$(CONFIG_PLAT_SAMSUNG) += s3c machine-$(CONFIG_ARCH_S5PV210) += s5pv210 machine-$(CONFIG_ARCH_SA1100) += sa1100 machine-$(CONFIG_ARCH_RENESAS) += shmobile -machine-$(CONFIG_ARCH_SOCFPGA) += socfpga +machine-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga machine-$(CONFIG_ARCH_STI) += sti machine-$(CONFIG_ARCH_STM32) += stm32 machine-$(CONFIG_ARCH_SUNXI) += sunxi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 8e5d4ab4e75e..d1b7459bc572 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1033,7 +1033,7 @@ dtb-$(CONFIG_ARCH_S5PV210) += \ s5pv210-smdkc110.dtb \ s5pv210-smdkv210.dtb \ s5pv210-torbreck.dtb -dtb-$(CONFIG_ARCH_SOCFPGA) += \ +dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \ socfpga_arria5_socdk.dtb \ socfpga_arria10_socdk_nand.dtb \ socfpga_arria10_socdk_qspi.dtb \ diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index c3bb68d57cea..e43ed0ca6860 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -2,6 +2,7 @@ menuconfig ARCH_SOCFPGA bool "Altera SOCFPGA family" depends on ARCH_MULTI_V7 + select ARCH_INTEL_SOCFPGA select ARCH_SUPPORTS_BIG_ENDIAN select ARM_AMBA select ARM_GIC @@ -20,6 +21,9 @@ menuconfig ARCH_SOCFPGA select PL310_ERRATA_769419 if ARCH_SOCFPGA +config ARCH_INTEL_SOCFPGA + bool + config SOCFPGA_SUSPEND bool "Suspend to RAM on SOCFPGA" help diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index cdfd5fed457f..ecab67a1afb8 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -256,9 +256,13 @@ config ARCH_SEATTLE config ARCH_STRATIX10 bool "Altera's Stratix 10 SoCFPGA Family" + select ARCH_INTEL_SOCFPGA help This enables support for Altera's Stratix 10 SoCFPGA Family. +config ARCH_INTEL_SOCFPGA + bool + config ARCH_SYNQUACER bool "Socionext SynQuacer SoC Family" diff --git a/arch/arm64/boot/dts/altera/Makefile b/arch/arm64/boot/dts/altera/Makefile index 10119c7ab437..4db83fbeb115 100644 --- a/arch/arm64/boot/dts/altera/Makefile +++ b/arch/arm64/boot/dts/altera/Makefile @@ -1,3 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-only -dtb-$(CONFIG_ARCH_STRATIX10) += socfpga_stratix10_socdk.dtb \ +dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_stratix10_socdk.dtb \ socfpga_stratix10_socdk_nand.dtb -- cgit v1.2.3 From cd5f39070ae131e8955b96e66d93aaf71db88e6f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 11 Mar 2021 16:25:33 +0100 Subject: mfd: altera: merge ARCH_SOCFPGA and ARCH_STRATIX10 Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only one for both of them. This the common practice for other platforms. Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come from multiple vendors. The side effect is that the MFD_ALTERA_A10SR will now be available for both 32-bit and 64-bit Intel SoCFPGA, even though it is used only for 32-bit. Acked-by: Lee Jones Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- drivers/mfd/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index b74efa469e90..2ce9edb90901 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -21,7 +21,7 @@ config MFD_CS5535 config MFD_ALTERA_A10SR bool "Altera Arria10 DevKit System Resource chip" - depends on ARCH_SOCFPGA && SPI_MASTER=y && OF + depends on ARCH_INTEL_SOCFPGA && SPI_MASTER=y && OF select REGMAP_SPI select MFD_CORE help @@ -32,7 +32,7 @@ config MFD_ALTERA_A10SR config MFD_ALTERA_SYSMGR bool "Altera SOCFPGA System Manager" - depends on (ARCH_SOCFPGA || ARCH_STRATIX10) && OF + depends on ARCH_INTEL_SOCFPGA && OF select MFD_SYSCON help Select this to get System Manager support for all Altera branded -- cgit v1.2.3 From 3409fb0987dc0e3199c13e4de6ad678cdbeae007 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 11 Mar 2021 16:25:34 +0100 Subject: net: stmmac: merge ARCH_SOCFPGA and ARCH_STRATIX10 Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only one for both of them. This the common practice for other platforms. Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come from multiple vendors. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- drivers/net/ethernet/stmicro/stmmac/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig index e675ba12fde2..7737e4d0bb9e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig @@ -140,8 +140,8 @@ config DWMAC_ROCKCHIP config DWMAC_SOCFPGA tristate "SOCFPGA dwmac support" - default (ARCH_SOCFPGA || ARCH_STRATIX10) - depends on OF && (ARCH_SOCFPGA || ARCH_STRATIX10 || COMPILE_TEST) + default ARCH_INTEL_SOCFPGA + depends on OF && (ARCH_INTEL_SOCFPGA || COMPILE_TEST) select MFD_SYSCON help Support for ethernet controller on Altera SOCFPGA -- cgit v1.2.3 From a01be32fccbb8cc0f6a3a155cf6bb5f528a4e20c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 11 Mar 2021 16:25:35 +0100 Subject: clk: socfpga: build together Stratix 10, Agilex and N5X clock drivers On a multiplatform kernel there is little benefit in splitting each clock driver per platform because space savings are minimal. Such split also complicates the code, especially after adding compile testing. Build all arm64 Intel SoCFPGA clocks together with one entry in Makefile. This also removed duplicated line in the Makefile (selecting common part of clocks per platform). Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- drivers/clk/socfpga/Kconfig | 6 +++--- drivers/clk/socfpga/Makefile | 7 +++---- 2 files changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig index 3c30617169bf..bc102e0f0be0 100644 --- a/drivers/clk/socfpga/Kconfig +++ b/drivers/clk/socfpga/Kconfig @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 config CLK_INTEL_SOCFPGA64 bool - # Intel Agilex / N5X clock controller support - default (ARCH_AGILEX || ARCH_N5X) - depends on ARCH_AGILEX || ARCH_N5X + # Intel Stratix / Agilex / N5X clock controller support + default (ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10) + depends on ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10 diff --git a/drivers/clk/socfpga/Makefile b/drivers/clk/socfpga/Makefile index c6db8dd4ab35..ebd3538d12de 100644 --- a/drivers/clk/socfpga/Makefile +++ b/drivers/clk/socfpga/Makefile @@ -1,7 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_ARCH_SOCFPGA) += clk.o clk-gate.o clk-pll.o clk-periph.o obj-$(CONFIG_ARCH_SOCFPGA) += clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o -obj-$(CONFIG_ARCH_STRATIX10) += clk-s10.o -obj-$(CONFIG_ARCH_STRATIX10) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o -obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-agilex.o -obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o +obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-s10.o \ + clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o \ + clk-agilex.o -- cgit v1.2.3 From 2011431b97ce06483d497cc41cc921d3924bd5f7 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 11 Mar 2021 16:25:36 +0100 Subject: clk: socfpga: merge ARCH_SOCFPGA and ARCH_STRATIX10 Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only one for both of them. This the common practice for other platforms. Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come from multiple vendors. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- drivers/clk/Makefile | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 12e46b12e587..1e29e5ad107a 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -104,10 +104,9 @@ obj-y += renesas/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/ obj-$(CONFIG_CLK_SIFIVE) += sifive/ -obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/ +obj-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga/ obj-$(CONFIG_ARCH_AGILEX) += socfpga/ obj-$(CONFIG_ARCH_N5X) += socfpga/ -obj-$(CONFIG_ARCH_STRATIX10) += socfpga/ obj-$(CONFIG_PLAT_SPEAR) += spear/ obj-y += sprd/ obj-$(CONFIG_ARCH_STI) += st/ -- cgit v1.2.3 From 098da961d8b8c279d34a8f7cd26ff0317f718df6 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 11 Mar 2021 16:25:37 +0100 Subject: EDAC: altera: merge ARCH_SOCFPGA and ARCH_STRATIX10 Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only one for both of them. This the common practice for other platforms. Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come from multiple vendors. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- drivers/edac/Kconfig | 2 +- drivers/edac/altera_edac.c | 17 +++++++++++------ 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig index 27d0c4cdc58d..1e836e320edd 100644 --- a/drivers/edac/Kconfig +++ b/drivers/edac/Kconfig @@ -396,7 +396,7 @@ config EDAC_THUNDERX config EDAC_ALTERA bool "Altera SOCFPGA ECC" - depends on EDAC=y && (ARCH_SOCFPGA || ARCH_STRATIX10) + depends on EDAC=y && ARCH_INTEL_SOCFPGA help Support for error detection and correction on the Altera SOCs. This is the global enable for the diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c index e91cf1147a4e..5f7fd79ec82f 100644 --- a/drivers/edac/altera_edac.c +++ b/drivers/edac/altera_edac.c @@ -1501,8 +1501,13 @@ static int altr_portb_setup(struct altr_edac_device_dev *device) dci->mod_name = ecc_name; dci->dev_name = ecc_name; - /* Update the PortB IRQs - A10 has 4, S10 has 2, Index accordingly */ -#ifdef CONFIG_ARCH_STRATIX10 + /* + * Update the PortB IRQs - A10 has 4, S10 has 2, Index accordingly + * + * FIXME: Instead of ifdefs with different architectures the driver + * should properly use compatibles. + */ +#ifdef CONFIG_64BIT altdev->sb_irq = irq_of_parse_and_map(np, 1); #else altdev->sb_irq = irq_of_parse_and_map(np, 2); @@ -1521,7 +1526,7 @@ static int altr_portb_setup(struct altr_edac_device_dev *device) goto err_release_group_1; } -#ifdef CONFIG_ARCH_STRATIX10 +#ifdef CONFIG_64BIT /* Use IRQ to determine SError origin instead of assigning IRQ */ rc = of_property_read_u32_index(np, "interrupts", 1, &altdev->db_irq); if (rc) { @@ -1931,7 +1936,7 @@ static int altr_edac_a10_device_add(struct altr_arria10_edac *edac, goto err_release_group1; } -#ifdef CONFIG_ARCH_STRATIX10 +#ifdef CONFIG_64BIT /* Use IRQ to determine SError origin instead of assigning IRQ */ rc = of_property_read_u32_index(np, "interrupts", 0, &altdev->db_irq); if (rc) { @@ -2016,7 +2021,7 @@ static const struct irq_domain_ops a10_eccmgr_ic_ops = { /************** Stratix 10 EDAC Double Bit Error Handler ************/ #define to_a10edac(p, m) container_of(p, struct altr_arria10_edac, m) -#ifdef CONFIG_ARCH_STRATIX10 +#ifdef CONFIG_64BIT /* panic routine issues reboot on non-zero panic_timeout */ extern int panic_timeout; @@ -2109,7 +2114,7 @@ static int altr_edac_a10_probe(struct platform_device *pdev) altr_edac_a10_irq_handler, edac); -#ifdef CONFIG_ARCH_STRATIX10 +#ifdef CONFIG_64BIT { int dberror, err_addr; -- cgit v1.2.3 From 4a9a1a5602d82c079325bf37466af0b67d6c0b9e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 11 Mar 2021 16:25:38 +0100 Subject: arm64: socfpga: merge Agilex and N5X into ARCH_INTEL_SOCFPGA Agilex, N5X and Stratix 10 share all quite similar arm64 hard cores and SoC-part. Up to a point that N5X uses the same DTSI as Agilex. From the Linux kernel point of view these are flavors of the same architecture so there is no need for three top-level arm64 architectures. Simplify this by merging all three architectures into ARCH_INTEL_SOCFPGA and dropping the other ARCH* arm64 Kconfig entries. The side effect is that the INTEL_STRATIX10_SERVICE will now be available for both 32-bit and 64-bit Intel SoCFPGA, even though it is used only for 64-bit. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- arch/arm64/Kconfig.platforms | 21 ++++----------------- arch/arm64/boot/dts/intel/Makefile | 6 +++--- arch/arm64/configs/defconfig | 2 +- drivers/clk/Makefile | 2 -- drivers/clk/socfpga/Kconfig | 4 ++-- drivers/firmware/Kconfig | 2 +- drivers/fpga/Kconfig | 2 +- drivers/reset/Kconfig | 2 +- 8 files changed, 13 insertions(+), 28 deletions(-) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index ecab67a1afb8..ce50dd129eec 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -8,16 +8,6 @@ config ARCH_ACTIONS help This enables support for the Actions Semiconductor S900 SoC family. -config ARCH_AGILEX - bool "Intel's Agilex SoCFPGA Family" - help - This enables support for Intel's Agilex SoCFPGA Family. - -config ARCH_N5X - bool "Intel's eASIC N5X SoCFPGA Family" - help - This enables support for Intel's eASIC N5X SoCFPGA Family. - config ARCH_SUNXI bool "Allwinner sunxi 64-bit SoC Family" select ARCH_HAS_RESET_CONTROLLER @@ -254,14 +244,11 @@ config ARCH_SEATTLE help This enables support for AMD Seattle SOC Family -config ARCH_STRATIX10 - bool "Altera's Stratix 10 SoCFPGA Family" - select ARCH_INTEL_SOCFPGA - help - This enables support for Altera's Stratix 10 SoCFPGA Family. - config ARCH_INTEL_SOCFPGA - bool + bool "Intel's SoCFPGA ARMv8 Families" + help + This enables support for Intel's SoCFPGA ARMv8 families: + Stratix 10 (ex. Altera), Agilex and eASIC N5X. config ARCH_SYNQUACER bool "Socionext SynQuacer SoC Family" diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel/Makefile index 3a052540605b..0b5477442263 100644 --- a/arch/arm64/boot/dts/intel/Makefile +++ b/arch/arm64/boot/dts/intel/Makefile @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only -dtb-$(CONFIG_ARCH_AGILEX) += socfpga_agilex_socdk.dtb \ - socfpga_agilex_socdk_nand.dtb +dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_socdk.dtb \ + socfpga_agilex_socdk_nand.dtb \ + socfpga_n5x_socdk.dtb dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb -dtb-$(CONFIG_ARCH_N5X) += socfpga_n5x_socdk.dtb diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index d612f633b771..fe2da18ae78f 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -50,7 +50,7 @@ CONFIG_ARCH_RENESAS=y CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_S32=y CONFIG_ARCH_SEATTLE=y -CONFIG_ARCH_STRATIX10=y +CONFIG_ARCH_INTEL_SOCFPGA=y CONFIG_ARCH_SYNQUACER=y CONFIG_ARCH_TEGRA=y CONFIG_ARCH_SPRD=y diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 1e29e5ad107a..96802294d35a 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -105,8 +105,6 @@ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/ obj-$(CONFIG_CLK_SIFIVE) += sifive/ obj-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga/ -obj-$(CONFIG_ARCH_AGILEX) += socfpga/ -obj-$(CONFIG_ARCH_N5X) += socfpga/ obj-$(CONFIG_PLAT_SPEAR) += spear/ obj-y += sprd/ obj-$(CONFIG_ARCH_STI) += st/ diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig index bc102e0f0be0..b6c5b9737174 100644 --- a/drivers/clk/socfpga/Kconfig +++ b/drivers/clk/socfpga/Kconfig @@ -2,5 +2,5 @@ config CLK_INTEL_SOCFPGA64 bool # Intel Stratix / Agilex / N5X clock controller support - default (ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10) - depends on ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10 + default ARM64 && ARCH_INTEL_SOCFPGA + depends on ARM64 && ARCH_INTEL_SOCFPGA diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index 3f14dffb9669..6a4e882e448d 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -206,7 +206,7 @@ config FW_CFG_SYSFS_CMDLINE config INTEL_STRATIX10_SERVICE tristate "Intel Stratix10 Service Layer" - depends on (ARCH_STRATIX10 || ARCH_AGILEX) && HAVE_ARM_SMCCC + depends on ARCH_INTEL_SOCFPGA && HAVE_ARM_SMCCC default n help Intel Stratix10 service layer runs at privileged exception level, diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index 5ff9438b7b46..fd325e9c5ce6 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -60,7 +60,7 @@ config FPGA_MGR_ZYNQ_FPGA config FPGA_MGR_STRATIX10_SOC tristate "Intel Stratix10 SoC FPGA Manager" - depends on (ARCH_STRATIX10 && INTEL_STRATIX10_SERVICE) + depends on (ARCH_INTEL_SOCFPGA && INTEL_STRATIX10_SERVICE) help FPGA manager driver support for the Intel Stratix10 SoC. diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 4171c6f76385..b1e8efa16166 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -183,7 +183,7 @@ config RESET_SCMI config RESET_SIMPLE bool "Simple Reset Controller Driver" if COMPILE_TEST - default ARCH_AGILEX || ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARC + default ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC help This enables a simple reset controller driver for reset lines that that can be asserted and deasserted by toggling bits in a contiguous, -- cgit v1.2.3 From cdb1e8b4f4c2e515bfe3fd4d9d49bb9a5fc3806f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 11 Mar 2021 16:27:07 +0100 Subject: clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks The Stratix 10 / Agilex / N5X clocks do not use anything other than OF or COMMON_CLK so they should be compile testable on most of the platforms. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- drivers/clk/Makefile | 2 +- drivers/clk/socfpga/Kconfig | 15 ++++++++++++--- 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 96802294d35a..9b582b3fca34 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -104,7 +104,7 @@ obj-y += renesas/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/ obj-$(CONFIG_CLK_SIFIVE) += sifive/ -obj-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga/ +obj-y += socfpga/ obj-$(CONFIG_PLAT_SPEAR) += spear/ obj-y += sprd/ obj-$(CONFIG_ARCH_STI) += st/ diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig index b6c5b9737174..b62ede8cad01 100644 --- a/drivers/clk/socfpga/Kconfig +++ b/drivers/clk/socfpga/Kconfig @@ -1,6 +1,15 @@ # SPDX-License-Identifier: GPL-2.0 +config CLK_INTEL_SOCFPGA + bool "Intel SoCFPGA family clock support" if COMPILE_TEST && !ARCH_INTEL_SOCFPGA + default ARCH_INTEL_SOCFPGA + help + Support for the clock controllers present on Intel SoCFPGA and eASIC + devices like Stratix 10, Agilex and N5X eASIC. + +if CLK_INTEL_SOCFPGA + config CLK_INTEL_SOCFPGA64 - bool - # Intel Stratix / Agilex / N5X clock controller support + bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST && (!ARM64 || !ARCH_INTEL_SOCFPGA) default ARM64 && ARCH_INTEL_SOCFPGA - depends on ARM64 && ARCH_INTEL_SOCFPGA + +endif # CLK_INTEL_SOCFPGA -- cgit v1.2.3 From 552418658acd6302e971c7137cb7d3108e464829 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 11 Mar 2021 16:27:15 +0100 Subject: clk: socfpga: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs (and compile test) ARCH_SOCFPGA is being renamed to ARCH_INTEL_SOCFPGA so adjust the 32-bit ARM drivers to rely on new symbol. There is little point to share clock controller drivers between 32-bit and 64-bit platforms because there will not be a generic image for both of them. Therefore add a new Kconfig entry for building 32-bit clock driverss, similar to one for 64-bit. This allows enabling compile testing. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- drivers/clk/socfpga/Kconfig | 6 +++++- drivers/clk/socfpga/Makefile | 4 ++-- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig index b62ede8cad01..0cf16b894efb 100644 --- a/drivers/clk/socfpga/Kconfig +++ b/drivers/clk/socfpga/Kconfig @@ -4,10 +4,14 @@ config CLK_INTEL_SOCFPGA default ARCH_INTEL_SOCFPGA help Support for the clock controllers present on Intel SoCFPGA and eASIC - devices like Stratix 10, Agilex and N5X eASIC. + devices like Aria, Cyclone, Stratix 10, Agilex and N5X eASIC. if CLK_INTEL_SOCFPGA +config CLK_INTEL_SOCFPGA32 + bool "Intel Aria / Cyclone clock controller support" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA) + default ARM && ARCH_INTEL_SOCFPGA + config CLK_INTEL_SOCFPGA64 bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST && (!ARM64 || !ARCH_INTEL_SOCFPGA) default ARM64 && ARCH_INTEL_SOCFPGA diff --git a/drivers/clk/socfpga/Makefile b/drivers/clk/socfpga/Makefile index ebd3538d12de..e8dfce339c91 100644 --- a/drivers/clk/socfpga/Makefile +++ b/drivers/clk/socfpga/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_ARCH_SOCFPGA) += clk.o clk-gate.o clk-pll.o clk-periph.o -obj-$(CONFIG_ARCH_SOCFPGA) += clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o +obj-$(CONFIG_CLK_INTEL_SOCFPGA32) += clk.o clk-gate.o clk-pll.o clk-periph.o \ + clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-s10.o \ clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o \ clk-agilex.o -- cgit v1.2.3 From 5c03887268082c1dd89034e1a9143bbec5fecae0 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 11 Mar 2021 16:27:31 +0100 Subject: dmaengine: socfpga: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs ARCH_SOCFPGA is being renamed to ARCH_INTEL_SOCFPGA so adjust the 32-bit ARM drivers to rely on new symbol. Acked-By: Vinod Koul Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- drivers/dma/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index 0c2827fd8c19..a0836ffc22e0 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -100,7 +100,7 @@ config AT_XDMAC config AXI_DMAC tristate "Analog Devices AXI-DMAC DMA support" - depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_SOCFPGA || COMPILE_TEST + depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS select REGMAP_MMIO -- cgit v1.2.3 From 3a1fef70ff875ec58dca7002e219943afd7d240c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 11 Mar 2021 16:27:35 +0100 Subject: fpga: altera: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs ARCH_SOCFPGA is being renamed to ARCH_INTEL_SOCFPGA so adjust the 32-bit ARM drivers to rely on new symbol. Acked-by: Moritz Fischer Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- drivers/fpga/Kconfig | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index fd325e9c5ce6..b1026c6fb119 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -14,13 +14,13 @@ if FPGA config FPGA_MGR_SOCFPGA tristate "Altera SOCFPGA FPGA Manager" - depends on ARCH_SOCFPGA || COMPILE_TEST + depends on ARCH_INTEL_SOCFPGA || COMPILE_TEST help FPGA manager driver support for Altera SOCFPGA. config FPGA_MGR_SOCFPGA_A10 tristate "Altera SoCFPGA Arria10" - depends on ARCH_SOCFPGA || COMPILE_TEST + depends on ARCH_INTEL_SOCFPGA || COMPILE_TEST select REGMAP_MMIO help FPGA manager driver support for Altera Arria10 SoCFPGA. @@ -99,7 +99,7 @@ config FPGA_BRIDGE config SOCFPGA_FPGA_BRIDGE tristate "Altera SoCFPGA FPGA Bridges" - depends on ARCH_SOCFPGA && FPGA_BRIDGE + depends on ARCH_INTEL_SOCFPGA && FPGA_BRIDGE help Say Y to enable drivers for FPGA bridges for Altera SOCFPGA devices. -- cgit v1.2.3 From 823829dc18b1ffabeb1c2cbd66a2a07980f1fad6 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 11 Mar 2021 16:27:38 +0100 Subject: i2c: altera: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs ARCH_SOCFPGA is being renamed to ARCH_INTEL_SOCFPGA so adjust the 32-bit ARM drivers to rely on new symbol. The side effect is that the I2C_ALTERA will now be available for both 32-bit and 64-bit Intel SoCFPGA, even though it is used only for 32-bit. Acked-by: Wolfram Sang Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- drivers/i2c/busses/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 05ebf7546e3f..3eec59f1fed3 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -369,7 +369,7 @@ comment "I2C system bus drivers (mostly embedded / system-on-chip)" config I2C_ALTERA tristate "Altera Soft IP I2C" - depends on ARCH_SOCFPGA || NIOS2 || COMPILE_TEST + depends on ARCH_INTEL_SOCFPGA || NIOS2 || COMPILE_TEST depends on OF help If you say yes to this option, support will be included for the -- cgit v1.2.3 From 225c13f0b7b69bec79520717e7ebb6e035457dbb Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 11 Mar 2021 16:27:41 +0100 Subject: reset: socfpga: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs ARCH_SOCFPGA is being renamed to ARCH_INTEL_SOCFPGA so adjust the 32-bit ARM drivers to rely on new symbol. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- drivers/reset/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index b1e8efa16166..7043c7f6dcf0 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -205,8 +205,8 @@ config RESET_STM32MP157 This enables the RCC reset controller driver for STM32 MPUs. config RESET_SOCFPGA - bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA - default ARCH_SOCFPGA + bool "SoCFPGA Reset Driver" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA) + default ARM && ARCH_INTEL_SOCFPGA select RESET_SIMPLE help This enables the reset driver for the SoCFPGA ARMv7 platforms. This -- cgit v1.2.3 From 4483397b03536506535d611b0cb28a81a69e8edf Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 11 Mar 2021 16:27:44 +0100 Subject: ARM: socfpga: drop ARCH_SOCFPGA Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only one for both of them. After conversion of all drivers to use the new ARCH_INTEL_SOCFPGA, the remaining ARM option can be removed. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- arch/arm/configs/multi_v7_defconfig | 2 +- arch/arm/configs/socfpga_defconfig | 2 +- arch/arm/mach-socfpga/Kconfig | 8 ++------ 3 files changed, 4 insertions(+), 8 deletions(-) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index 3823da605430..591b15164e3d 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -79,7 +79,7 @@ CONFIG_ARCH_MSM8960=y CONFIG_ARCH_MSM8974=y CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_RENESAS=y -CONFIG_ARCH_SOCFPGA=y +CONFIG_ARCH_INTEL_SOCFPGA=y CONFIG_PLAT_SPEAR=y CONFIG_ARCH_SPEAR13XX=y CONFIG_MACH_SPEAR1310=y diff --git a/arch/arm/configs/socfpga_defconfig b/arch/arm/configs/socfpga_defconfig index 0c60eb382c80..2d9404ea52c6 100644 --- a/arch/arm/configs/socfpga_defconfig +++ b/arch/arm/configs/socfpga_defconfig @@ -9,7 +9,7 @@ CONFIG_NAMESPACES=y CONFIG_BLK_DEV_INITRD=y CONFIG_EMBEDDED=y CONFIG_PROFILING=y -CONFIG_ARCH_SOCFPGA=y +CONFIG_ARCH_INTEL_SOCFPGA=y CONFIG_ARM_THUMBEE=y CONFIG_SMP=y CONFIG_NR_CPUS=2 diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index e43ed0ca6860..43ddec677c0b 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -1,8 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only -menuconfig ARCH_SOCFPGA +menuconfig ARCH_INTEL_SOCFPGA bool "Altera SOCFPGA family" depends on ARCH_MULTI_V7 - select ARCH_INTEL_SOCFPGA select ARCH_SUPPORTS_BIG_ENDIAN select ARM_AMBA select ARM_GIC @@ -20,10 +19,7 @@ menuconfig ARCH_SOCFPGA select PL310_ERRATA_753970 if PL310 select PL310_ERRATA_769419 -if ARCH_SOCFPGA -config ARCH_INTEL_SOCFPGA - bool - +if ARCH_INTEL_SOCFPGA config SOCFPGA_SUSPEND bool "Suspend to RAM on SOCFPGA" help -- cgit v1.2.3