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authorPaolo Bonzini <pbonzini@redhat.com>2014-11-25 15:00:56 +0100
committerJunio C Hamano <gitster@pobox.com>2014-11-25 15:27:01 -0800
commita078f7321b02eb945b63804a80b0ba52c9da4ed3 (patch)
tree85c9fd21df647a326c93d847f69c6475b48ffe91 /contrib/persistent-https
parentgit-mailinfo: add --message-id (diff)
downloadgit-a078f7321b02eb945b63804a80b0ba52c9da4ed3.tar.gz
git-a078f7321b02eb945b63804a80b0ba52c9da4ed3.zip
git-am: add --message-id/--no-message-id
Parse the option and pass it directly to git-mailinfo. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Junio C Hamano <gitster@pobox.com>
Diffstat (limited to 'contrib/persistent-https')
0 files changed, 0 insertions, 0 deletions
>+6 2016-09-05clk: renesas: r8a7796: Add THS/TSC clockKhiem Nguyen1-0/+1 2016-09-05clk: renesas: rz: Select EXTAL vs USB clockChris Brandt1-2/+22 2016-09-04clk: rockchip: use the dclk_vop_frac clock ids on rk3399Yakir Yang1-2/+2 2016-09-04clk: rockchip: drop CLK_SET_RATE_PARENT from rk3399 fractional dividersDouglas Anderson1-13/+13 2016-09-04clk: rockchip: add 2016M to big cpu clk rate table on rk3399Shunqian Zheng1-0/+1 2016-09-04clk: rockchip: add rk3399 ddr clock supportLin Huang1-0/+19 2016-09-04clk: rockchip: add dclk_vop_frac ids for rk3399 vopYakir Yang1-0/+2 2016-09-02clk: meson-gxbb: Export PWM related clocks for DTNeil Armstrong2-3/+6 2016-09-01meson: clk: Add support for clock gatesAlexander Müller2-0/+254 2016-09-01gxbb: clk: Adjust MESON_GATE macro to be shared with meson8bAlexander Müller2-85/+85 2016-09-01clk: meson: Copy meson8b CLKID defines to private header fileAlexander Müller3-3/+107 2016-09-01meson: clk: Rename register names according to Amlogic datasheetAlexander Müller2-19/+18 2016-09-01meson: clk: Move register definitions to meson8b.hAlexander Müller2-16/+41 2016-09-01clk: meson: Rename meson8b-clkc.c to reflect gxbb naming conventionAlexander Müller2-1/+1 2016-09-01clk: rockchip: add new clock-type for the ddrclkLin Huang4-0/+197