diff options
| author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2023-03-14 13:34:33 +0530 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-03-15 15:17:21 -0700 |
| commit | 116a932bbc7bc740b068fbfe320a465811ca62f8 (patch) | |
| tree | 84ad4f5f17fab4a907b56cd225066da5088f7c7c | |
| parent | bfe088bde391824040c39cbf277d7fe782042936 (diff) | |
| download | linux-116a932bbc7bc740b068fbfe320a465811ca62f8.tar.gz linux-116a932bbc7bc740b068fbfe320a465811ca62f8.zip | |
arm64: dts: qcom: sc7180: Fix the base addresses of LLCC banks
The LLCC block has several banks each with a different base address
and holes in between. So it is not a correct approach to cover these
banks with a single offset/size. Instead, the individual bank's base
address needs to be specified in devicetree with the exact size.
On SC7180, there is only one LLCC bank available. So let's just pass that
as "llcc0_base".
Reported-by: Parikshit Pareek <quic_ppareek@quicinc.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230314080443.64635-5-manivannan.sadhasivam@linaro.org
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 53f0076f20f6..fb84aa480d91 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -2768,7 +2768,7 @@ system-cache-controller@9200000 { compatible = "qcom,sc7180-llcc"; reg = <0 0x09200000 0 0x50000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg-names = "llcc0_base", "llcc_broadcast_base"; interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; }; |