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authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>2025-05-12 19:23:20 +0100
committerBiju Das <biju.das.jz@bp.renesas.com>2025-05-24 08:49:37 +0100
commit1f957fbb88b61eaf5ac9bf2db6bc2e54121a4359 (patch)
tree7fb32aa538214f4b7d6484797cc2ad7d2ee1b02c
parentdt-bindings: display: renesas,rzg2l-du: Add support for RZ/V2H(P) SoC (diff)
downloadlinux-1f957fbb88b61eaf5ac9bf2db6bc2e54121a4359.tar.gz
linux-1f957fbb88b61eaf5ac9bf2db6bc2e54121a4359.zip
drm: renesas: rz-du: Add support for RZ/V2H(P) SoC
The LCD controller (LCDC) on the RZ/V2H(P) SoC is composed of Frame Compression Processor (FCPVD), Video Signal Processor (VSPD), and Display Unit (DU). There is one LCDC unit available on the RZ/V2H(P) SoC which is connected to the DSI. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20250512182330.238259-3-prabhakar.mahadev-lad.rj@bp.renesas.com
-rw-r--r--drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c
index 5e40f0c1e7b0..e1aa6a719529 100644
--- a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c
+++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c
@@ -50,9 +50,20 @@ static const struct rzg2l_du_device_info rzg2l_du_r9a07g044_info = {
}
};
+static const struct rzg2l_du_device_info rzg2l_du_r9a09g057_info = {
+ .channels_mask = BIT(0),
+ .routes = {
+ [RZG2L_DU_OUTPUT_DSI0] = {
+ .possible_outputs = BIT(0),
+ .port = 0,
+ },
+ },
+};
+
static const struct of_device_id rzg2l_du_of_table[] = {
{ .compatible = "renesas,r9a07g043u-du", .data = &rzg2l_du_r9a07g043u_info },
{ .compatible = "renesas,r9a07g044-du", .data = &rzg2l_du_r9a07g044_info },
+ { .compatible = "renesas,r9a09g057-du", .data = &rzg2l_du_r9a09g057_info },
{ /* sentinel */ }
};