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authorDuje Mihanović <duje@dujemihanovic.xyz>2025-09-13 23:21:08 +0200
committerDuje Mihanović <duje@dujemihanovic.xyz>2025-10-13 12:11:38 +0200
commit35aa5733ac3f96a2f1cb7266bbd89f231cbd85eb (patch)
treebb6779d58b6e10b9849c8a41243a7c1914acec02
parent412f54866385ad688d438524b5c6c2ffcd5f5cb9 (diff)
downloadlinux-35aa5733ac3f96a2f1cb7266bbd89f231cbd85eb.tar.gz
linux-35aa5733ac3f96a2f1cb7266bbd89f231cbd85eb.zip
arm64: dts: marvell: pxa1908: Move ramoops to SoC dtsi
The ramoops memory region is the same for all boards based on the SoC. Move its node to the appropriate dtsi. Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
-rw-r--r--arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts12
-rw-r--r--arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi14
2 files changed, 14 insertions, 12 deletions
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
index 1de9dd14b83b..e78e176575ef 100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
@@ -38,10 +38,6 @@
};
reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
framebuffer@17000000 {
reg = <0 0x17000000 0 0x1800000>;
no-map;
@@ -63,14 +59,6 @@
seclog@8000000 {
reg = <0 0x8000000 0 0x100000>;
};
-
- ramoops@8100000 {
- compatible = "ramoops";
- reg = <0 0x8100000 0 0x40000>;
- record-size = <0x8000>;
- console-size = <0x20000>;
- max-reason = <5>;
- };
};
i2c-muic {
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi b/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi
index 61498fd75d1d..deb1a9df27c2 100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi
@@ -58,6 +58,20 @@
method = "smc";
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ ramoops@8100000 {
+ compatible = "ramoops";
+ reg = <0 0x8100000 0 0x40000>;
+ record-size = <0x8000>;
+ console-size = <0x20000>;
+ max-reason = <5>;
+ };
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,