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| author | Matt Roper <matthew.d.roper@intel.com> | 2025-10-13 13:10:00 -0700 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2025-10-14 07:45:17 -0700 |
| commit | 4f3ecdb6ea2cde339148c7b200e50ef061bea0e2 (patch) | |
| tree | 765955be9534834b692b928bc1651ef30e2ac928 | |
| parent | 794e735cb6d52713b382d87a8c14678e15d3e7f8 (diff) | |
| download | linux-4f3ecdb6ea2cde339148c7b200e50ef061bea0e2.tar.gz linux-4f3ecdb6ea2cde339148c7b200e50ef061bea0e2.zip | |
drm/xe: Bypass Wa_14018094691 when primary GT is disabled
Don't try to lookup Wa_14018094691 on a NULL GT when the primary GT is
disabled. Since this whole workaround centers around mid-thread
preemption behavior, the workaround isn't relevant if the primary GT
(where the engines that can do MTP live) is disabled.
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://lore.kernel.org/r/20251013200944.2499947-42-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
| -rw-r--r-- | drivers/gpu/drm/xe/xe_gsc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/xe/xe_gsc.c b/drivers/gpu/drm/xe/xe_gsc.c index 83d61bf8ec62..dd69cb834f8e 100644 --- a/drivers/gpu/drm/xe/xe_gsc.c +++ b/drivers/gpu/drm/xe/xe_gsc.c @@ -266,7 +266,7 @@ static int gsc_upload_and_init(struct xe_gsc *gsc) unsigned int fw_ref; int ret; - if (XE_GT_WA(tile->primary_gt, 14018094691)) { + if (tile->primary_gt && XE_GT_WA(tile->primary_gt, 14018094691)) { fw_ref = xe_force_wake_get(gt_to_fw(tile->primary_gt), XE_FORCEWAKE_ALL); /* @@ -281,7 +281,7 @@ static int gsc_upload_and_init(struct xe_gsc *gsc) ret = gsc_upload(gsc); - if (XE_GT_WA(tile->primary_gt, 14018094691)) + if (tile->primary_gt && XE_GT_WA(tile->primary_gt, 14018094691)) xe_force_wake_put(gt_to_fw(tile->primary_gt), fw_ref); if (ret) |