aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorBjorn Andersson <andersson@kernel.org>2024-08-15 16:11:50 -0500
committerBjorn Andersson <andersson@kernel.org>2024-08-15 16:11:50 -0500
commit562a2a89ab4e90f4e66bec1af518cd4be708b1ec (patch)
tree174e37ec440872caf60bc3a490a47d179291e6f8
parentarm64: dts: qcom: msm8976: Add restart node (diff)
parentdt-bindings: clock: gcc-msm8998: Add Q6 and LPASS clocks definitions (diff)
downloadlinux-562a2a89ab4e90f4e66bec1af518cd4be708b1ec.tar.gz
linux-562a2a89ab4e90f4e66bec1af518cd4be708b1ec.zip
Merge branch '20240814-lpass-v1-1-a5bb8f9dfa8b@freebox.fr' into arm64-for-6.12
Merge MSM8998 GCC binding update, to get access to the newly introduced LPASS clock and GDSC constants.
-rw-r--r--include/dt-bindings/clock/qcom,gcc-msm8998.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/qcom,gcc-msm8998.h b/include/dt-bindings/clock/qcom,gcc-msm8998.h
index b5456a64d421..5b0dde080900 100644
--- a/include/dt-bindings/clock/qcom,gcc-msm8998.h
+++ b/include/dt-bindings/clock/qcom,gcc-msm8998.h
@@ -193,10 +193,15 @@
#define GCC_MMSS_GPLL0_DIV_CLK 184
#define GCC_GPU_GPLL0_DIV_CLK 185
#define GCC_GPU_GPLL0_CLK 186
+#define HLOS1_VOTE_LPASS_CORE_SMMU_CLK 187
+#define HLOS1_VOTE_LPASS_ADSP_SMMU_CLK 188
+#define GCC_MSS_Q6_BIMC_AXI_CLK 189
#define PCIE_0_GDSC 0
#define UFS_GDSC 1
#define USB_30_GDSC 2
+#define LPASS_ADSP_GDSC 3
+#define LPASS_CORE_GDSC 4
#define GCC_BLSP1_QUP1_BCR 0
#define GCC_BLSP1_QUP2_BCR 1