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| author | Clément Le Goffic <clement.legoffic@foss.st.com> | 2025-06-16 11:21:04 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2025-06-24 16:43:02 +0100 |
| commit | bd60f94a3eb4f80cb66c9687d640554fd0c579d0 (patch) | |
| tree | 3c9aa83d6173f7704b90e576edbf25758aa917b5 | |
| parent | 4956bf44524394211ca80aa04d0c9e1e9bb0219d (diff) | |
| download | linux-bd60f94a3eb4f80cb66c9687d640554fd0c579d0.tar.gz linux-bd60f94a3eb4f80cb66c9687d640554fd0c579d0.zip | |
spi: dt-bindings: stm32: update bindings with SPI Rx DMA-MDMA chaining
Add MDMA channel, and new sram property which are mandatory to enable
SPI Rx DMA-MDMA chaining.
Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Link: https://patch.msgid.link/20250616-spi-upstream-v1-3-7e8593f3f75d@foss.st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/spi/st,stm32-spi.yaml | 48 |
1 files changed, 46 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml index 76e43c0ce36c..ca880a226afa 100644 --- a/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml +++ b/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml @@ -18,6 +18,38 @@ maintainers: allOf: - $ref: spi-controller.yaml# + - if: + properties: + compatible: + contains: + const: st,stm32f4-spi + + then: + properties: + st,spi-midi-ns: false + sram: false + dmas: + maxItems: 2 + dma-names: + items: + - const: rx + - const: tx + + - if: + properties: + compatible: + contains: + const: st,stm32mp25-spi + + then: + properties: + sram: false + dmas: + maxItems: 2 + dma-names: + items: + - const: rx + - const: tx properties: compatible: @@ -41,16 +73,28 @@ properties: dmas: description: | - DMA specifiers for tx and rx dma. DMA fifo mode must be used. See - the STM32 DMA controllers bindings Documentation/devicetree/bindings/dma/stm32/*.yaml. + DMA specifiers for tx and rx channels. DMA fifo mode must be used. See + the STM32 DMA bindings Documentation/devicetree/bindings/dma/stm32/st,*dma.yaml + minItems: 2 items: - description: rx DMA channel - description: tx DMA channel + - description: rxm2m MDMA channel dma-names: + minItems: 2 items: - const: rx - const: tx + - const: rxm2m + + sram: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + Phandles to a reserved SRAM region which is used as temporary + storage memory between DMA and MDMA engines. + The region should be defined as child node of the AHB SRAM node + as per the generic bindings in Documentation/devicetree/bindings/sram/sram.yaml access-controllers: minItems: 1 |
