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| author | Daniel Jurgens <danielj@nvidia.com> | 2025-07-09 15:41:07 +0300 |
|---|---|---|
| committer | Leon Romanovsky <leon@kernel.org> | 2025-07-13 03:17:30 -0400 |
| commit | cd1746cb6555a2238c4aae9f9d60b637a61bf177 (patch) | |
| tree | cd8ad83ad9becc44d976ac5b4bae2964d55daa16 | |
| parent | net/mlx5: Expose disciplined_fr_counter through HCA capabilities in mlx5_ifc (diff) | |
| download | linux-cd1746cb6555a2238c4aae9f9d60b637a61bf177.tar.gz linux-cd1746cb6555a2238c4aae9f9d60b637a61bf177.zip | |
net/mlx5: IFC updates for disabled host PF
The port 2 host PF can be disabled, this bit reflects that setting.
Signed-off-by: Daniel Jurgens <danielj@nvidia.com>
Reviewed-by: William Tu <witu@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/1752064867-16874-3-git-send-email-tariqt@nvidia.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
| -rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index d7684bb28a3a..639dd0b56655 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -12383,7 +12383,9 @@ struct mlx5_ifc_mtrc_ctrl_bits { struct mlx5_ifc_host_params_context_bits { u8 host_number[0x8]; - u8 reserved_at_8[0x7]; + u8 reserved_at_8[0x5]; + u8 host_pf_not_exist[0x1]; + u8 reserved_at_14[0x1]; u8 host_pf_disabled[0x1]; u8 host_num_of_vfs[0x10]; |