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authorJayesh Choudhary <j-choudhary@ti.com>2024-02-01 19:53:08 +0530
committerVignesh Raghavendra <vigneshr@ti.com>2024-02-06 09:30:10 +0530
commitcfdb4f7ffdb855c1a3d274dc7757e780dcbf2d55 (patch)
tree1fb1f83149ae1f9a7e1f2efe411b89e002c752b2
parentarm64: dts: ti: Makefile: Add HDMI audio check for AM62A7-SK (diff)
downloadlinux-cfdb4f7ffdb855c1a3d274dc7757e780dcbf2d55.tar.gz
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arm64: dts: ti: k3-am69-sk: remove assigned-clock-parents for unused VP
VP2 and VP3 are unused video ports and VP3 share the same parent clock as VP1 causing issue with pixel clock setting for HDMI (VP1). The current DM firmware does not support changing parent clock if it is shared by another component. It returns 0 for the determine_rate query before causing set_rate to set the clock at default maximum of 1.8GHz which is a lot more than the maximum frequency videoports can support (600MHz) causing SYNC LOST issues. So remove the parent clocks for unused VPs to avoid conflict. Fixes: 6f8605fd7d11 ("arm64: dts: ti: k3-am69-sk: Add DP and HDMI support") Reported-by: Nishanth Menon <nm@ti.com> Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com> Tested-by: Enric Balletbo i Serra <eballetbo@redhat.com> Link: https://lore.kernel.org/r/20240201142308.4954-1-j-choudhary@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
-rw-r--r--arch/arm64/boot/dts/ti/k3-am69-sk.dts8
1 files changed, 2 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
index e73f714b1230..988d7d83c6a7 100644
--- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
@@ -919,13 +919,9 @@
pinctrl-names = "default";
pinctrl-0 = <&dss_vout0_pins_default>;
assigned-clocks = <&k3_clks 218 2>,
- <&k3_clks 218 5>,
- <&k3_clks 218 14>,
- <&k3_clks 218 18>;
+ <&k3_clks 218 5>;
assigned-clock-parents = <&k3_clks 218 3>,
- <&k3_clks 218 7>,
- <&k3_clks 218 16>,
- <&k3_clks 218 22>;
+ <&k3_clks 218 7>;
};
&serdes_wiz4 {