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| author | Judith Mendez <jm@ti.com> | 2025-04-21 19:08:51 -0500 |
|---|---|---|
| committer | Nishanth Menon <nm@ti.com> | 2025-04-25 15:58:13 -0500 |
| commit | d864bb528a6725e775d564fd4430762acbb9dd0d (patch) | |
| tree | 65784ced956d112ab6e6c52211b8f6c411fbdae6 | |
| parent | 5aec1169b53969d07cc288814f7eebd2ef01f9a0 (diff) | |
| download | linux-d864bb528a6725e775d564fd4430762acbb9dd0d.tar.gz linux-d864bb528a6725e775d564fd4430762acbb9dd0d.zip | |
arm64: dts: ti: k3-am625-sk: Enable PWM
PWM signals can be routed to the user expansion header on am625
SK and am62 lp sk. Enable eCAP0, eCAP1, eHRPWM1, and route the
output PWM signals to pins on J3 header.
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20250422000851.4118545-4-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi index d52cb2a5a589..20d1437f253d 100644 --- a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi @@ -303,6 +303,25 @@ AM62X_IOPAD(0x078, PIN_OUTPUT, 1) /* (U24) GPMC0_AD15.VOUT0_DATA23 */ >; }; + + main_ecap0_pins_default: main-ecap0-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x01b8, PIN_OUTPUT, 3) /* (C13) SPI0_CS1.ECAP0_IN_APWM_OUT */ + >; + }; + + main_ecap2_pins_default: main-ecap2-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x01a4, PIN_OUTPUT, 2) /* (B20) MCASP0_ACLKX.ECAP2_IN_APWM_OUT */ + >; + }; + + main_epwm1_pins_default: main-epwm1-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x019c, PIN_OUTPUT, 6) /* (B18) MCASP0_AXR1.EHRPWM1_A */ + AM62X_IOPAD(0x01a0, PIN_OUTPUT, 6) /* (E18) MCASP0_AXR0.EHRPWM1_B */ + >; + }; }; &mcu_pmx0 { @@ -560,3 +579,24 @@ &mcu_gpio_intr { status = "reserved"; }; + +&ecap0 { + /* P26 of J3 */ + pinctrl-names = "default"; + pinctrl-0 = <&main_ecap0_pins_default>; + status = "okay"; +}; + +&ecap2 { + /* P11 of J3 */ + pinctrl-names = "default"; + pinctrl-0 = <&main_ecap2_pins_default>; + status = "okay"; +}; + +&epwm1 { + /* P36/P33 of J3 */ + pinctrl-names = "default"; + pinctrl-0 = <&main_epwm1_pins_default>; + status = "okay"; +}; |