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| author | Konrad Dybcio <konrad.dybcio@linaro.org> | 2023-01-04 18:16:41 +0100 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-01-18 17:33:10 -0600 |
| commit | e17a806571bb01bb951faeec645944850241eae3 (patch) | |
| tree | 676f7740915ced75f254cefc8ec4f930afc0c3d8 | |
| parent | arm64: dts: qcom: qcs404: specify per-sensor calibration cells (diff) | |
| download | linux-e17a806571bb01bb951faeec645944850241eae3.tar.gz linux-e17a806571bb01bb951faeec645944850241eae3.zip | |
arm64: dts: qcom: sm6350: Add OSM L3 node
Enable the OSM block responsible for scaling the L3 cache.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230104171643.1004054-2-konrad.dybcio@linaro.org
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm6350.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 837c681319d7..51ff33d24499 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -1678,6 +1678,16 @@ }; }; + osm_l3: interconnect@18321000 { + compatible = "qcom,sm6350-osm-l3", "qcom,osm-l3"; + reg = <0x0 0x18321000 0x0 0x1000>; + + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; + clock-names = "xo", "alternate"; + + #interconnect-cells = <1>; + }; + cpufreq_hw: cpufreq@18323000 { compatible = "qcom,cpufreq-hw"; reg = <0 0x18323000 0 0x1000>, <0 0x18325800 0 0x1000>; |