summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorAustin Zheng <Austin.Zheng@amd.com>2026-01-29 17:31:19 -0500
committerAlex Deucher <alexander.deucher@amd.com>2026-03-17 10:35:50 -0400
commitfabd89fc17fdfd1225afd69ca883fbd30226b4c9 (patch)
treea596b617c9ef5328af4bb9ba6347b968e5a68e7f
parent2c5f15ee2c760514c5be0f02cf9c9f1ff68b9ac8 (diff)
downloadlinux-fabd89fc17fdfd1225afd69ca883fbd30226b4c9.tar.gz
linux-fabd89fc17fdfd1225afd69ca883fbd30226b4c9.zip
drm/amd/display: Add dcn_mrq_present Field
[Why/How] Add MRQ flag so it can be passed from ip_caps to ip_params Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Austin Zheng <Austin.Zheng@amd.com> Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_soc_parameter_types.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_soc_parameter_types.h b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_soc_parameter_types.h
index ddbb8dfa9ff8..6152155d6073 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_soc_parameter_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_soc_parameter_types.h
@@ -192,6 +192,7 @@ struct dml2_ip_capabilities {
unsigned int max_flip_time_us;
unsigned int max_flip_time_lines;
unsigned int hostvm_mode;
+ bool dcn_mrq_present;
unsigned int subvp_drr_scheduling_margin_us;
unsigned int subvp_prefetch_end_to_mall_start_us;
unsigned int subvp_fw_processing_delay;