ata: ahci-dwc: Remove not-going-to-be-supported code for Baikal SoC

As noticed in the discussion [1] the Baikal SoC and platforms
are not going to be finalized, hence remove stale code.

Link: https://lore.kernel.org/lkml/22b92ddf-6321-41b5-8073-f9c7064d3432@infradead.org/ [1]
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Niklas Cassel <cassel@kernel.org>

1 files changed, 0 insertions, 115 deletions

diff --git a/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml b/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml
deleted file mode 100644
index 9b7ca4759bd7..000000000000
--- a/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml
+++ /dev/null
@@ -1,115 +0,0 @@
-# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/ata/baikal,bt1-ahci.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Baikal-T1 SoC AHCI SATA controller
-
-maintainers:
-  - Serge Semin <fancer.lancer@gmail.com>
-
-description:
-  AHCI SATA controller embedded into the Baikal-T1 SoC is based on the
-  DWC AHCI SATA v4.10a IP-core.
-
-allOf:
-  - $ref: snps,dwc-ahci-common.yaml#
-
-properties:
-  compatible:
-    const: baikal,bt1-ahci
-
-  clocks:
-    items:
-      - description: Peripheral APB bus clock
-      - description: Application AXI BIU clock
-      - description: SATA Ports reference clock
-
-  clock-names:
-    items:
-      - const: pclk
-      - const: aclk
-      - const: ref
-
-  resets:
-    items:
-      - description: Application AXI BIU domain reset
-      - description: SATA Ports clock domain reset
-
-  reset-names:
-    items:
-      - const: arst
-      - const: ref
-
-  ports-implemented:
-    maximum: 0x3
-
-patternProperties:
-  "^sata-port@[0-1]$":
-    $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port
-
-    properties:
-      reg:
-        minimum: 0
-        maximum: 1
-
-      snps,tx-ts-max:
-        $ref: /schemas/types.yaml#/definitions/uint32
-        description:
-          Due to having AXI3 bus interface utilized the maximum Tx DMA
-          transaction size can't exceed 16 beats (AxLEN[3:0]).
-        enum: [ 1, 2, 4, 8, 16 ]
-
-      snps,rx-ts-max:
-        $ref: /schemas/types.yaml#/definitions/uint32
-        description:
-          Due to having AXI3 bus interface utilized the maximum Rx DMA
-          transaction size can't exceed 16 beats (AxLEN[3:0]).
-        enum: [ 1, 2, 4, 8, 16 ]
-
-    unevaluatedProperties: false
-
-required:
-  - compatible
-  - reg
-  - interrupts
-  - clocks
-  - clock-names
-  - resets
-
-unevaluatedProperties: false
-
-examples:
-  - |
-    sata@1f050000 {
-      compatible = "baikal,bt1-ahci";
-      reg = <0x1f050000 0x2000>;
-      #address-cells = <1>;
-      #size-cells = <0>;
-
-      interrupts = <0 64 4>;
-
-      clocks = <&ccu_sys 1>, <&ccu_axi 2>, <&sata_ref_clk>;
-      clock-names = "pclk", "aclk", "ref";
-
-      resets = <&ccu_axi 2>, <&ccu_sys 0>;
-      reset-names = "arst", "ref";
-
-      ports-implemented = <0x3>;
-
-      sata-port@0 {
-        reg = <0>;
-
-        snps,tx-ts-max = <4>;
-        snps,rx-ts-max = <4>;
-      };
-
-      sata-port@1 {
-        reg = <1>;
-
-        snps,tx-ts-max = <4>;
-        snps,rx-ts-max = <4>;
-      };
-    };
-...