aboutsummaryrefslogtreecommitdiffstats
path: root/Documentation
diff options
context:
space:
mode:
authorIlkka Koskinen <ilkka@os.amperecomputing.com>2025-08-28 15:35:19 -0700
committerWill Deacon <will@kernel.org>2025-09-18 13:52:13 +0100
commit71396cfac97d0249fa7d8dcc8e649b6ba4c090e4 (patch)
tree16fdce267f181fc3be6359c6a6f3ad8f6fabf216 /Documentation
parentdrivers: perf: use us_to_ktime() where appropriate (diff)
downloadlinux-71396cfac97d0249fa7d8dcc8e649b6ba4c090e4.tar.gz
linux-71396cfac97d0249fa7d8dcc8e649b6ba4c090e4.zip
perf/dwc_pcie: Support counting multiple lane events in parallel
While Designware PCIe PMU allows to count only one time based event at a time, it allows to count all the lane events simultaneously. After the patch one is able to count a group of lane events: $ perf stat -e '{dwc_rootport/tx_memory_write,lane=1/,dwc_rootport/rx_memory_read,lane=0/}' dd if=/dev/nvme0n1 of=/dev/null bs=1M count=1 Earlier the events wouldn't have been counted successfully. Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com> Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/admin-guide/perf/dwc_pcie_pmu.rst4
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/admin-guide/perf/dwc_pcie_pmu.rst b/Documentation/admin-guide/perf/dwc_pcie_pmu.rst
index cb376f335f40..167f9281fbf5 100644
--- a/Documentation/admin-guide/perf/dwc_pcie_pmu.rst
+++ b/Documentation/admin-guide/perf/dwc_pcie_pmu.rst
@@ -16,8 +16,8 @@ provides the following two features:
- one 64-bit counter for Time Based Analysis (RX/TX data throughput and
time spent in each low-power LTSSM state) and
-- one 32-bit counter for Event Counting (error and non-error events for
- a specified lane)
+- one 32-bit counter per event for Event Counting (error and non-error
+ events for a specified lane)
Note: There is no interrupt for counter overflow.